Hello, I used ghdl to simulate my component with success but when I tried to simulate post-synthesis component (with xilinx webpack) I had an internal error :
[EMAIL PROTECTED]:~/projetxilinx/bus_led$ make ghdl-simsynth /usr/local/bin/ghdl -i --ieee=synopsys -P~/Xilinx92i/coregen/ip/xilinx/primary/com/xilinx/ip/unisim --warn-no-vital-generic --workdir=simu --work=work_led_top_tb bin/bus_led_ise/netgen/synthesis testbench/led_top_tb.vhd ******************** GHDL Bug occured **************************** Please report this bug on http://gna.org/projects/ghdl GHDL release: GHDL 0.26 (20070408) [Sokcho edition] Compiled with GNAT Version: GPL 2005 (20050729) In directory: /home/fabien/projetxilinx/bus_led/ Command line: /usr/local/bin/ghdl -i --ieee=synopsys -P~/Xilinx92i/coregen/ip/xilinx/primary/com/xilinx/ip/unisim --warn-no-vital-generic --workdir=simu --work=work_led_top_tb bin/bus_led_ise/netgen/synthesis testbench/led_top_tb.vhd Exception TYPES.INTERNAL_ERROR raised Exception information: Exception name: TYPES.INTERNAL_ERROR Message: files_map.adb:780 Call stack traceback locations: 0x80963df 0x808743a 0x80773e0 0x8098b8a 0x8058499 0x804a22b 0x4004104e ****************************************************************** make: *** [ghdl-simsynth] Erreur 2 Is a problem from ghdl or from me ? Thanks FabM
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