> Hello! > I've had the chance to use FPGAs at college last semester, and really > enjoyed it. >
I presume you used some integrated tool from Xilinx or Altera that did both VHDL simulation and synthesis with one specific software package? > Unfortunately, I'm unable to get an FPGA of my own, but I do have an ARM > development kit, and was thinking about using it as a (poor) replacement: My > idea is to compile my designs with GHDL, write some native I/O stuff, link > them together and run into my ARM kit. > Is this ARM kit somehow tied to an FPGA? As I understand ARM its a kind of MMU-less embedded processor. You can run operating systems on it, but only ones suitable for embedded applications. An FPGA is a set of configurable logic cells, and some have other digital devices on them that the FPGA cells can route signals to. > The problem is that I have no idea on how to use GHDL to compile to a > different platform. Since GHDL uses the GCC backend, I suppose it's > possible, but I don't know where to start. > Are you suggesting building a cross compiler for your ARM kit to run GHDL? And then building an OS to run on it, and THEN porting GHDL to it? Thats a tall order, and likely very hard to do, even if it was practical ... see below. > I'd like to hear what do you think about his project, and if you have any > ideas on how to set it to use the "ARM backend" instead. > I think you've got some terminology confused here. First off, GHDL is a VHDL *SIMULATOR* while the resulting binaries it produces are "runnable" they themselves have nothing to do with FPGA's or any VLSI fabrication process. They are only meant to run on the host platform and be tested for functional or logical correctness by testbenches etc, ie. that your VHDL does what you want it to do, over as many test scenarios as your test bench entities can test for. Once you have proven your design satisfactory, the translation of VHDL code into a netlist or mask is the job of a synthesis tool, usually driven by design rules specific to the process or technology in question. GHDL itself does NOT do synthesis of any kind, but simulation and design validation is actually the bulk of the work anyway. === You seem to be implying that by porting GHDL to ARM with a cross-compile build, that you are somehow "synthesizing" to ARM, instead of the FPGA's you used in school. You're misinterpreting and/or confusing the role of VHDL synthesis of a design to *actual hardware* with the act of *porting* GHDL to another processor architecture/OS platform. The ARM development kit is meant for *software* development. GHDL is meant for *hardware simulation* on a Unix/Linux platform. Use the ARM for your embedded platform along with uCLinux or other stripped down OS, and use GHDL for designing/simulating digital hardware, and assuming you've written good synthesizable VHDL, then use a synthesis tool for turning your VHDL into a hardware design targetted at a particular technology. === Just as an aside: I should also mention that to compile GHDL even on a 32-bit embedded processor, you'd need to have Ada support, since GHDL itself is written in Ada, and I don't think the embedded Linux platforms out there support Ada, only C and C++. You'd have to go to RTEMS for that, and thats assuming they even support your particular ARM board. So anyway ... I hope this clears up the confusion. Hope everyone (and esp. Tristan) had a Merry Christmas, and best wishes to you all for a hopeful and productive 2009. All you GHDL people rock! S. _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
