On Mon, Oct 26, 2009 at 5:21 PM, Peter LaDow <[email protected]> wrote: > On Sun, Oct 25, 2009 at 1:25 PM, Tristan Gingold <[email protected]> wrote: >> I am not sure how GHDL will work with pthreads. GHDL switches stacks, which >> might be not very well supported by pthreads.
Ok, a bit more information. I've completely eliminated the foreign subprograms. This is now a full VHDL design. And I still get the same error: [pete]$ ./fpga_stamp_t0 --trace-processes run process .fpga_stamp_t0(behav).t...@tcon_t0(behav).tcon_con [09C73328] ../../../tools/tb/tcon_t0/src/tcon_t0.vhd:150:7:@0ms:(assertion note): VHDL: Executing gpio_clr_dir ../../../tools/tb/tcon_t0/src/tcon_t0.vhd:150:7:@0ms:(assertion note): VHDL: Executing write ../../../tools/tb/tcon_t0/src/tcon_t0.vhd:125:7:@0ms:(assertion note): VHDL: Waiting for tcon_ack run process .fpga_stamp_t0(behav).t...@tcon_t0(behav).gpio_con [09C73328] run process .fpga_stamp_t0(behav).cloc...@clocker_t0(behav).tcon_con [09C778E8] run process .fpga_stamp_t0(behav).cloc...@clocker_t0(behav).clk_gen(0).clk_con [09C78870] Now is 0ms +0 ./fpga_stamp_t0:error: invalid memory access (dangling accesses or stack size too small) ./fpga_stamp_t0:error: simulation failed Looking at the options I decided to try getting more debug information. So I used "--dump-rti". I've attached a log of that output. To test out my GHDL build, I executed the DLX testsuite (as per http://ghdl.free.fr/ghdl/Starting-with-a-design.html). It correctly halts with a TRAP instruction. I've attached the pure VHDL project that demonstrates the problem. With this being much simpler, perhaps we can figure out some of the issues. Thanks, Pete
fpga_stamp_rti.log
Description: Binary data
ghdl-pladow-pure-vhdl.tar.bz2
Description: BZip2 compressed data
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