I think I found a bug in ghdl...
$ ghdl -a bug.vhd
bug.vhd:18:8: no choices for 2 to 3
/usr/lib/ghdl/bin/ghdl: compilation error
tried with ghdl 0.27 and ghdl 0.29 (same result)
library ieee;
use ieee.std_logic_1164.all;
entity bug is
end entity;
architecture Structure of bug is
type std_logic_vector2 is array( natural range<>,natural range<>)of std_logic;
component bug2
port (
a : in std_logic_vector2( 1 downto 0 , 3 downto 0 )
);
end component;
begin
buggy : bug2
port map (
a(1, 3) => '0',
a(1, 2) => '0',
a(1, 1) => '0',
a(1, 0) => '0',
a(0, 3) => '0',
a(0, 2) => '0',
a(0, 1) => '0',
a(0, 0) => '0'
);
end Structure;
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