Hi! I'm running into some trouble trying to include an IP-Core "FIR-Compiler 4.0" from Xilinx 10.4 into an existing ghdl-Projekt. Maybe someone is able to help me?
First, I include the Xilinx-vhd files: ------------------------------------------------------------- ghdl -i --work=unisim -fexplicit --workdir= $UNISIMDIR /opt/xilinx/10.1/ISE/vhdl/src/unisims/*.vhd ghdl -i --work=xilinxcorelib -fexplicit --workdir= $CORELIBDIR /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/*.vhd ------------------------------------------------------------- Then my own vhd Files: ------------------------------------------------------------- ghdl -i --workdir=$WORKDIR $LIBS ghdl -i --workdir=$WORKDIR *.vhd ------------------------------------------------------------- And then I try to "make" the simulation-binary: ------------------------------------------------------------- ghdl -m -P$UNISIMDIR -P$CORELIBDIR --workdir=$WORKDIR -fexplicit --ieee=synopsys $ENTITY ------------------------------------------------------------- But I'm getting some errors during analysing the Xilinx-vhd files: ------------------------------------------------------------- /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0.vhd:217:36: constant "round_mode" is not visible here /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0.vhd:220:41: constant "round_mode" is not visible here /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0.vhd:222:41: constant "round_mode" is not visible here /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0.vhd:224:39: constant "round_mode" is not visible here ------------------------------------------------------------- I tried to comment-out the complete declaration of the named constant. But I have to admit that I didn't dig any deeper into the code... Now, ghdl runs through (with a whole bunch of warnings), but crashes right afterwards: ------------------------------------------------------------- ... analyze fir_compiler_v4_0.vhd fir_compiler_v4_0.vhd:119:1:warning: no default binding for instantiation of component "wrapped_fir_compiler_v4_0" fir_compiler_v4_0.vhd:55:11:warning: visible declaration for wrapped_fir_compiler_v4_0 is component "wrapped_fir_compiler_v4_0" fir_compiler_v4_0.vhd:55:11:warning: no entity "wrapped_fir_compiler_v4_0" in library "work" analyze byte2file.vhd analyze /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0_mac_fir.vhd ******************** GHDL Bug occured **************************** Please report this bug on http://gna.org/projects/ghdl GHDL release: GHDL 0.28 (20090917) [Sokcho edition] Compiled with GNAT Version: GPL 2008 (20080521) In directory: /home/user/code/fpga/ Command line: /usr/local/libexec/gcc/i686-pc-linux-gnu/4.3.4/ghdl1 -Punisim -Pcorelib --workdir=work -fexplicit --warn-default-binding --warn-binding --warn-library --warn-body --warn-specs --warn-unused -Punisim/ -Pcorelib/ -P/usr/local/lib/gcc/i686-pc-linux-gnu/4.3.4/vhdl/lib//v93/std/ -P/usr/local/lib/gcc/i686-pc-linux-gnu/4.3.4/vhdl/lib//v93/synopsys/ --work=xilinxcorelib --workdir=corelib/ -quiet -o corelib/fir_compiler_v4_0_mac_fir.s /opt/xilinx/10.1/ISE/vhdl/src/XilinxCoreLib/fir_compiler_v4_0_mac_fir.vhd Exception TYPES.INTERNAL_ERROR raised Exception information: Exception name: TYPES.INTERNAL_ERROR Message: translation.adb:3347 Call stack traceback locations: 0x80c5c45 0x80f2e48 0x80f8289 0x80f0cb4 0x8103763 0x8103b1e 0x80f0e13 0x80f82de 0x80f0cb4 0x80f3194 0x80fd6b8 0x80febca 0x80ff339 0x8111d4d 0x8111dba 0x8112639 0x81139e2 0x81173ce 0x8057628 0x804b9cc ****************************************************************** Execution terminated by unhandled exception Exception name: TYPES.INTERNAL_ERROR Message: translation.adb:3347 Call stack traceback locations: 0x80c5c45 0x80f2e48 0x80f8289 0x80f0cb4 0x8103763 0x8103b1e 0x80f0e13 0x80f82de 0x80f0cb4 0x80f3194 0x80fd6b8 0x80febca 0x80ff339 0x8111d4d 0x8111dba 0x8112639 0x81139e2 0x81173ce 0x8057628 0x804b9cc ghdl: compilation error ------------------------------------------------------------- Now I don't know whether to blame - me for providing uncomplete declaration of my *.vhd-files - me for wrong editing of Xilinx-code - ghdl for crashing - Xilinx for writing and providing ugly and unportable code... Can somebody have an eye on this? Thanks a lot Martin _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
