On Saturday 17 April 2010 18:15:29 Yann Guidon wrote:
> Let's start with GHDL : it does not need to be deeply modified.
> What we need is some way to convert valid VHDL to EDIF,
> and GHDL converts VHDL to executable code.
[...]

You mentioned you wanted to get going quickly. Maybe this will help. Icarus 
Verilog already does some synthesis to EDIF, so:

  1) Make a Verilog backend for GHDL, then use Icarus Verilog for synthesis.

  2) Or if not that, Icarus Verilog is open source -- you might want to look 
at how it works for a starting point.

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