Hello, As far as i know, in VHDL, integers have no support for xor, not, and, or, shl, shr... it does make some kinds of behavioural tests pretty slow because it forces the use of std_ulogic_vectors. what are your tricks or ideas for dealing with this ? I could make a package that imports the operations from C but it would be so much better and faster if it was included directly in the compiler, like in any other language...
yg _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
