On 26/06/11 3:21 PM, Wesley J. Landaker wrote: > On 06/25/2011 02:51 PM, Wesley J. Landaker wrote: >> I've found a strange bug with GHDL and buffer ports. > > On more investigation, this seems to be a bug with "bit", not buffer > ports. If I switch to using numeric_std and std_ulogic and change > nothing else it starts to work. > > So still a bug, just in a different place than I first thought. >
Out of curiosity, how did you pursue this architecture in the first place? It appears to pivot on the use of a variable for val and combining the operation of the val counter in the same process as a sequential assertion statement (because val is a variable). Make val a signal and you can get the code to work without an extra wait statement, with num as a bit. Because in general wait for delays are not synthesizable, timed model comparisons aren't really an issue. Your model isn't particularly interesting for 'hardware'. Why switching num to numeric_std would also work isn't particularly intuitive to me. This shows up in the Mac OS X mcode version too. _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
