Hi, sorry for delay. thank you for the info, christophe.curis@ and diogratia@.
> And ya, I apologize for being verbose. no problem, this is very informative to me. > In the mean time Mr. Masaru please file a bug on gna > (https://gna.org/support/?group=ghdl&func=additem) > (and yes the certificate is wonky, it's okay). > It'd be worth archiving the oisc test case for inclusion, too. > It may not be available on bitbucket by the time someone takes it seriously. you already filed a bug w/ my source code at https://gna.org/bugs/?18810 of course, you can use my code for what ever you want to. > I take it this a Xilinx dual port memory? i wrote this just for fun, is not implementation proposed though. and yes, XST 13.2 can synthesize not only LVT_DMEM = true but also LVT_DMEM = false. FYI, "XST User Guide for Virtex-6, Spartan-6, and 7 Series Devices UG687 (v 13.2) July 6, 2011 on " said, Modeling a RAM in VHDL (Two Write Ports) To model a RAM with two write ports in VHDL, use a shared variable instead of a signal. type ram_type is array (0 to 255) of std_logic_vector (15 downto 0); shared variable RAM : ram_type; • XST rejects an attempt to use a signal to model a RAM with two write ports. Such a model does not behave correctly during simulation. • Shared variables are an extension of variables, allowing inter-process communication. – Use shared variables with even greater caution than variables. – Shared variables inherit all basic characteristics from variables. – The order in which items in a sequential process are described can condition the functionality being modeled. – Two or more processes making assignments to a shared variable in the same simulation cycle can lead to unpredictable results. • Although shared variables are valid and accepted by XST, do not use a shared variable if the RAM has only one write port. Use a signal instead. and I saw LVT method on comp.lang.vhdl, http://groups.google.com/group/comp.arch.fpga/browse_thread/thread/d12f605d8f3c1fc5?hl=en Peace, _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
