Hi,
I've tried this with CycloneIII devices and netlists generated with
Quartus11.1.
I hacked the following altera simulation libraries at
quartus/eda/sim_lib:
altera_mf.vhd altera_mf_components.vhd altera_primitives.vhd
altera_primitives_components.vhd cycloneiii_components.vhd
cycloneiii_atoms.vhd
to use ieee.numeric_std.all. I found ghdl didn't like object files with
ieee=synopsys and ieee=standard mixed together. I deleted some
architectures (altaccumulator etc that I don't use) because they did
signed*unsigned. Also type specifications using exponentiation were
converted to use constants (perhaps I should have used
ieee.math_real.all?).
The simulation netlist compiled but running failed with:
"internal error: cannot allocate stack: memory exhausted"
I experimented a bit with:
a. bash ulimit -s 512000
b. ghdl --stack-max-size=1M --stack-size=1K
c. ghdl --vcdgz=$prog"_structure.vcd.gz"
then gave up.
Perhaps someone else has had more success and can suggest what to do?
Regards,
Rob
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