Hi Rene, have a look at helpers.c:logic_to_uint(), etc. from ghdlex:
http://section5.ch/downloads/ghdlex-0.03eval.tgz Greetings, - Martin > I want to control a division operation in a testbench and use in C > written function. > The important that I have signed an unsigned operators. And the result > is sometimes a little different in signed bits and so on. > > The Controlfunction is in C and I tried to use the follows package. I > want no use interger variables the cast is not possible because the > operator can be signed or unsigend. ( I have also two div opertors div > and divu, the example is for only one div-operator). > > The main question, how can I interconnect std_logic_vector into VHPI? > > -------------------c function---------------- > #include <stdio.h> > #include <stdlib.h> > > unsigned long division (unsigned long dividend, unsigned long divisor) > { unsigned long qotient; > qotient= dividend/divisor; > return qotient; > } > ------------------------------------------------------ > > > > package div_pack is > > function division (divdent,divisor :std_logic_vector(31 downto 0)) > return std_logic_vector(31 downto 0); > attribute foreign of division : > function is "VHPIDIRECT division"; > > end; > > package body div_pack is > function division (divdent,divisor :std_logic_vector(31 downto 0)) > return std_logic_vector(31 downto 0) is > > begin > assert false report "VHPI" severity failure; > end division; > > end div_pack; > > > _______________________________________________ > Ghdl-discuss mailing list > [email protected] > https://mail.gna.org/listinfo/ghdl-discuss > _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
