Hello Brian,

fuse.exe is launched with the '--rangecheck' option. There is no such option 
for the
executable (uart_rx_tb.exe), which is then launched and connected to the iSim 
GUI.

So in my testcase it's enabled by default. QuestaSim does not complain. It uses 
the same
testbench and source files as iSim and GHDL. If I uncomment the self-written 
assert
procedure, even xSim compiles without any range check failure.

If one want's to try by himself, the testbench is available at GitHub:
File-List: 
https://github.com/VLSI-EDA/PoC/blob/master/tb/io/uart/uart_rx_tb.files
Testbench: 
https://github.com/VLSI-EDA/PoC/blob/master/tb/io/uart/uart_rx_tb.vhdl
Executing the testbench: ./tb/testbench.sh --ghdl PoC.io.uart.rx -vg

Quick-start on how to run PoC testbenches: 
https://github.com/VLSI-EDA/PoC/wiki/Testbenches

I also tried to run GHDL in VHDL'08 mode. The failure is the same, just another 
line number in
the std*.v08 file.


Regards
    Patrick

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-----Original Message-----
From: Ghdl-discuss [mailto:[email protected]] On Behalf Of Brian 
Drummond
Sent: Tuesday, August 11, 2015 12:28 PM
To: [email protected]
Subject: Re: [Ghdl-discuss] Bound check failure in std_logic_1164_body.v93

On Mon, 2015-08-10 at 22:07 +0000, Lehmann, Patrick wrote:
> Hello,
> 
>  
> 
> I implemented a new testbench for a UART receiver. As far as I can 
> tell this testbench works fine
> 
> in ISE Simulator. After some tests, I changed my automated testbench 
> script to use GHDL, vSim and xSim.

One comment on the ISE Simulator run : by default, ISIM doesn't perform bound 
checking but you can turn it on with an option (Process Properties, Advanced 
view). Does that make any difference with your TB?

-- Brian




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