Thanks for the replies. Pondering on it.......
It is some kinde of fifo with 16 elements, each element being 32-bit. So I thought this could work as well : w(15 downto 1) <= w(14 downto 0); w(0) <= std_logic_vector(unsigned(w(15)) + unsigned(s0) + unsigned(w(6)) + unsigned(s1)); and it did. best regards Simon On Sat, Apr 23, 2016 at 9:40 PM, David Koontz <diogra...@gmail.com> wrote: > The bug shows up with the llvm version of ghdl-0.33 as well. > > The cause(found by commenting out concurrent statements) is this > assignment in process extension_pipe: > > w <= w(14 downto 0) & std_logic_vector(unsigned(w(15)) + unsigned(s0) > + unsigned(w(6)) + unsigned(s1)); > > The first thing to note is that "&" and "+" are the same preference and > would be executed in left to right order, it isn't possible to add > unsigned(s0),... to reordered w. > > Simply adding parentheses didn't fix it: > > w <= w(14 downto 0) & ( > std_logic_vector ( > unsigned(w(15)) + unsigned(s0) + unsigned(w(6)) + unsigned(s1) > ) > ); > > While adding an intermediary variable: > > extension_pipe: > process(clock) > variable x: std_logic_vector (31 downto 0); > begin > > and > > elsif intenable = '1' then > x := std_logic_vector ( unsigned(w(15)) + unsigned(s0) > + unsigned(w(6)) + unsigned(s1) ); > w <= w(14 downto 0) & x; > > -- w <= w(14 downto 0) & std_logic_vector(unsigned(w(15)) + > unsigned(s0) + unsigned(w(6)) + unsigned(s1)); > end if; > > did work. > > Nothing else I tried worked (the right hand side as an aggregate, > specifically stating the type as wt). > > This appears to be an expression stack problem. I'd suspect of wt were an > array of unsigned (31 downto 0) you might not have this problem, it may > relate to the type conversions and multiple additions. > > > On 24/04/2016, at 6:39 am, Simon Thijs de Feber <st.de.fe...@gmail.com> > wrote: > > Hello All, > > I am using GHDL version > GHDL 0.33 (20150921) [Dunoon edition] > Compiled with GNAT Version: 5.2.0 > GCC back-end code generator > > > I got this exception for an unknown reason while compiling a sha256 core > from opencores. > > ghdl -a --ieee=synopsys -fexplicit -v > ../../securehash256bits_org/trunk/sha256.vhd > /usr/local/libexec/gcc/i686-slackware-linux/4.9.3/ghdl1 -fexplicit > -P/usr/local/lib/gcc/i686-slackware-linux/4.9.3/vhdl//v93/std/ > -P/usr/local/lib/gcc/i686-slackware-linux/4.9.3/vhdl//v93/synopsys/ -quiet > -o sha256.s ../../securehash256bits_org/trunk/sha256.vhd > > ******************** GHDL Bug occured **************************** > Please report this bug on http://gna.org/projects/ghdl > GHDL release: GHDL 0.33 (20150921) [Dunoon edition] > Compiled with GNAT Version: 5.2.0 > In directory: /home/stdefeber/projects/sandbox/ax_hmac/ghdl/ > Command line: > /usr/local/libexec/gcc/i686-slackware-linux/4.9.3/ghdl1 -fexplicit > -P/usr/local/lib/gcc/i686-slackware-linux/4.9.3/vhdl//v93/std/ > -P/usr/local/lib/gcc/i686-slackware-linux/4.9.3/vhdl//v93/synopsys/ -quiet > -o sha256.s ../../securehash256bits_org/trunk/sha256.vhd > Exception TYPES.INTERNAL_ERROR raised > Exception information: > Exception name: TYPES.INTERNAL_ERROR > Message: trans.adb:1516 > Call stack traceback locations: > 0x82282f5 0x8250165 0x8250733 0x8251e1a 0x8251f5f 0x825264f 0x8213459 > 0x8208e70 0x8212a5c 0x8214580 0x82115ee 0x8240cff 0x823dcf5 0x823dd42 > 0x823dd8c 0x823f02a 0x823dcf5 0x823dd42 0x823f02a 0x823dcf5 0x8233879 > 0x825acc0 0x822a895 0x825ca13 0x81abd4c 0x81864b3 0x856b180 0x856cdfd > 0x81abdba 0x8183dba 0xb75ad29e 0x8184268 > ****************************************************************** > > Execution terminated by unhandled exception > Exception name: TYPES.INTERNAL_ERROR > Message: trans.adb:1516 > Call stack traceback locations: > 0x82282f5 0x8250165 0x8250733 0x8251e1a 0x8251f5f 0x825264f 0x8213459 > 0x8208e70 0x8212a5c 0x8214580 0x82115ee 0x8240cff 0x823dcf5 0x823dd42 > 0x823dd8c 0x823f02a 0x823dcf5 0x823dd42 0x823f02a 0x823dcf5 0x8233879 > 0x825acc0 0x822a895 0x825ca13 0x81abd4c 0x81864b3 0x856b180 0x856cdfd > 0x81abdba 0x8183dba 0xb75ad29e 0x8184268 > ghdl: compilation error > > VHDL code is attached. > I changed the code from using std_logic unsigned to numeric_std. > Both version exhibit same error. > > best regards > > Simon > > > > > > > <sha256.vhd>_______________________________________________ > Ghdl-discuss mailing list > Ghdl-discuss@gna.org > https://mail.gna.org/listinfo/ghdl-discuss > > > > _______________________________________________ > Ghdl-discuss mailing list > Ghdl-discuss@gna.org > https://mail.gna.org/listinfo/ghdl-discuss > >
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