I wanted to use a trick which I learned from Jim Lewis during his course
"Advanced VHDL Testbenches & Verification". However that did not work :( in
GHDL and works in Aldec.

I have 2 procedures request_transaction and wait_for transaction which
basically handshake in 0 ns.
This allows for back to back transfers in bus funtional and transaction
based models.

Any one tried this ?

best regards,

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