tree 8a8981461a4f84a007f4725a027f3185055737ea
parent 757f612e091e7d13707eedc3ff71f1a9b53f5537
author Michael Chan <[EMAIL PROTECTED]> Wed, 10 Aug 2005 10:16:32 -0700
committer David S. Miller <[EMAIL PROTECTED]> Tue, 30 Aug 2005 05:50:12 -0700

[TG3]: Add basic register access function pointers

This patch adds the basic function pointers to do register accesses in
the fast path. This was suggested by David Miller. The idea is that
various register access methods for different hardware errata can easily
be implemented with these function pointers and performance will not be
degraded on chips that use normal register access methods.

The various register read write macros (e.g. tw32, tr32, tw32_mailbox)
are redefined to call the function pointers.

Signed-off-by: Michael Chan <[EMAIL PROTECTED]>
Signed-off-by: David S. Miller <[EMAIL PROTECTED]>

 drivers/net/tg3.c |   34 +++++++++++++++++++++++-----------
 drivers/net/tg3.h |    8 ++++++++
 2 files changed, 31 insertions(+), 11 deletions(-)

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -366,7 +366,7 @@ static void _tw32_flush(struct tg3 *tp, 
        }
 }
 
-static inline void _tw32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
+static void tg3_write32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
 {
        void __iomem *mbox = tp->regs + off;
        writel(val, mbox);
@@ -374,7 +374,7 @@ static inline void _tw32_rx_mbox(struct 
                readl(mbox);
 }
 
-static inline void _tw32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
+static void tg3_write32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
 {
        void __iomem *mbox = tp->regs + off;
        writel(val, mbox);
@@ -384,17 +384,23 @@ static inline void _tw32_tx_mbox(struct 
                readl(mbox);
 }
 
-#define tw32_mailbox(reg, val)  writel(((val) & 0xffffffff), tp->regs + (reg))
-#define tw32_rx_mbox(reg, val)  _tw32_rx_mbox(tp, reg, val)
-#define tw32_tx_mbox(reg, val)  _tw32_tx_mbox(tp, reg, val)
+static void tg3_write32(struct tg3 *tp, u32 off, u32 val)
+{
+       writel(val, tp->regs + off);
+}
 
-#define tw32(reg,val)          tg3_write_indirect_reg32(tp,(reg),(val))
+static u32 tg3_read32(struct tg3 *tp, u32 off)
+{
+       return (readl(tp->regs + off)); 
+}
+
+#define tw32_mailbox(reg, val) tp->write32_mbox(tp, reg, val)
+#define tw32_rx_mbox(reg, val) tp->write32_rx_mbox(tp, reg, val)
+#define tw32_tx_mbox(reg, val) tp->write32_tx_mbox(tp, reg, val)
+
+#define tw32(reg,val)          tp->write32(tp, reg, val)
 #define tw32_f(reg,val)                _tw32_flush(tp,(reg),(val))
-#define tw16(reg,val)          writew(((val) & 0xffff), tp->regs + (reg))
-#define tw8(reg,val)           writeb(((val) & 0xff), tp->regs + (reg))
-#define tr32(reg)              readl(tp->regs + (reg))
-#define tr16(reg)              readw(tp->regs + (reg))
-#define tr8(reg)               readb(tp->regs + (reg))
+#define tr32(reg)              tp->read32(tp, reg)
 
 static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
 {
@@ -9325,6 +9331,12 @@ static int __devinit tg3_get_invariants(
                pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, 
pci_state_reg);
        }
 
+       tp->read32 = tg3_read32;
+       tp->write32 = tg3_write_indirect_reg32;
+       tp->write32_mbox = tg3_write32;
+       tp->write32_tx_mbox = tg3_write32_tx_mbox;
+       tp->write32_rx_mbox = tg3_write32_rx_mbox;
+
        /* Get eeprom hw config before calling tg3_set_power_state().
         * In particular, the TG3_FLAG_EEPROM_WRITE_PROT flag must be
         * determined before calling tg3_set_power_state() so that
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2049,6 +2049,10 @@ struct tg3 {
        spinlock_t                      lock;
        spinlock_t                      indirect_lock;
 
+       u32                             (*read32) (struct tg3 *, u32);
+       void                            (*write32) (struct tg3 *, u32, u32);
+       void                            (*write32_mbox) (struct tg3 *, u32,
+                                                        u32);
        void __iomem                    *regs;
        struct net_device               *dev;
        struct pci_dev                  *pdev;
@@ -2060,6 +2064,8 @@ struct tg3 {
        u32                             msg_enable;
 
        /* begin "tx thread" cacheline section */
+       void                            (*write32_tx_mbox) (struct tg3 *, u32,
+                                                           u32);
        u32                             tx_prod;
        u32                             tx_cons;
        u32                             tx_pending;
@@ -2071,6 +2077,8 @@ struct tg3 {
        dma_addr_t                      tx_desc_mapping;
 
        /* begin "rx thread" cacheline section */
+       void                            (*write32_rx_mbox) (struct tg3 *, u32,
+                                                           u32);
        u32                             rx_rcb_ptr;
        u32                             rx_std_ptr;
        u32                             rx_jumbo_ptr;
-
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