tree 3bec0fea8b4c98c51d8865d5144068420f0fd09f
parent 541134cfe7af179f45458b68421ee1da7bab9cba
author Jeff Garzik <[EMAIL PROTECTED]> Sun, 31 Jul 2005 21:13:24 -0400
committer Jeff Garzik <[EMAIL PROTECTED]> Sun, 31 Jul 2005 21:13:24 -0400

libata: trim trailing whitespace.

Also, fixup a tabs-to-spaces block of code in ata_piix.

 drivers/scsi/ata_piix.c    |   14 ++--
 drivers/scsi/libata-core.c |    4 -
 drivers/scsi/libata.h      |    2 
 drivers/scsi/sata_qstor.c  |    2 
 drivers/scsi/sata_sil.c    |    4 -
 drivers/scsi/sata_sis.c    |    2 
 drivers/scsi/sata_svw.c    |   10 +--
 drivers/scsi/sata_sx4.c    |  138 ++++++++++++++++++++++-----------------------
 drivers/scsi/sata_uli.c    |    2 
 drivers/scsi/sata_via.c    |    2 
 drivers/scsi/sata_vsc.c    |    2 
 include/linux/libata.h     |    2 
 12 files changed, 92 insertions(+), 92 deletions(-)

diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
--- a/drivers/scsi/ata_piix.c
+++ b/drivers/scsi/ata_piix.c
@@ -629,13 +629,13 @@ static int piix_init_one (struct pci_dev
        port_info[1] = NULL;
 
        if (port_info[0]->host_flags & PIIX_FLAG_AHCI) {
-               u8 tmp;
-               pci_read_config_byte(pdev, PIIX_SCC, &tmp);
-               if (tmp == PIIX_AHCI_DEVICE) {
-                       int rc = piix_disable_ahci(pdev);
-                       if (rc)
-                           return rc;
-               }
+               u8 tmp;
+               pci_read_config_byte(pdev, PIIX_SCC, &tmp);
+               if (tmp == PIIX_AHCI_DEVICE) {
+                       int rc = piix_disable_ahci(pdev);
+                       if (rc)
+                               return rc;
+               }
        }
 
        if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) {
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -1304,12 +1304,12 @@ static inline u8 ata_dev_knobble(struct 
 /**
  *     ata_dev_config - Run device specific handlers and check for
  *                      SATA->PATA bridges
- *     @ap: Bus 
+ *     @ap: Bus
  *     @i:  Device
  *
  *     LOCKING:
  */
- 
+
 void ata_dev_config(struct ata_port *ap, unsigned int i)
 {
        /* limit bridge transfers to udma5, 200 sectors */
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -72,7 +72,7 @@ extern unsigned int ata_scsiop_report_lu
 extern void ata_scsi_badcmd(struct scsi_cmnd *cmd,
                            void (*done)(struct scsi_cmnd *),
                            u8 asc, u8 ascq);
-extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, 
+extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args,
                         unsigned int (*actor) (struct ata_scsi_args *args,
                                            u8 *rbuf, unsigned int buflen));
 
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
--- a/drivers/scsi/sata_qstor.c
+++ b/drivers/scsi/sata_qstor.c
@@ -431,7 +431,7 @@ static inline unsigned int qs_intr_mmio(
                                        continue;
                                DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
                                        ap->id, qc->tf.protocol, status);
-               
+
                                /* complete taskfile transaction */
                                pp->state = qs_state_idle;
                                ata_qc_complete(qc, status);
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -323,13 +323,13 @@ static void sil_dev_config(struct ata_po
        while ((len > 0) && (s[len - 1] == ' '))
                len--;
 
-       for (n = 0; sil_blacklist[n].product; n++) 
+       for (n = 0; sil_blacklist[n].product; n++)
                if (!memcmp(sil_blacklist[n].product, s,
                            strlen(sil_blacklist[n].product))) {
                        quirks = sil_blacklist[n].quirk;
                        break;
                }
-       
+
        /* limit requests to 15 sectors */
        if (quirks & SIL_QUIRK_MOD15WRITE) {
                printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c
--- a/drivers/scsi/sata_sis.c
+++ b/drivers/scsi/sata_sis.c
@@ -234,7 +234,7 @@ static int sis_init_one (struct pci_dev 
        pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
        if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
                probe_ent->host_flags |= SIS_FLAG_CFGSCR;
-       
+
        /* if hardware thinks SCRs are in IO space, but there are
         * no IO resources assigned, change to PCI cfg space.
         */
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
--- a/drivers/scsi/sata_svw.c
+++ b/drivers/scsi/sata_svw.c
@@ -195,18 +195,18 @@ static void k2_bmdma_start_mmio (struct 
        /* start host DMA transaction */
        dmactl = readb(mmio + ATA_DMA_CMD);
        writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
-       /* There is a race condition in certain SATA controllers that can 
-          be seen when the r/w command is given to the controller before the 
+       /* There is a race condition in certain SATA controllers that can
+          be seen when the r/w command is given to the controller before the
           host DMA is started. On a Read command, the controller would initiate
           the command to the drive even before it sees the DMA start. When 
there
-          are very fast drives connected to the controller, or when the data 
request 
+          are very fast drives connected to the controller, or when the data 
request
           hits in the drive cache, there is the possibility that the drive 
returns a part
           or all of the requested data to the controller before the DMA start 
is issued.
           In this case, the controller would become confused as to what to do 
with the data.
           In the worst case when all the data is returned back to the 
controller, the
           controller could hang. In other cases it could return partial data 
returning
           in data corruption. This problem has been seen in PPC systems and 
can also appear
-          on an system with very fast disks, where the SATA controller is 
sitting behind a 
+          on an system with very fast disks, where the SATA controller is 
sitting behind a
           number of bridges, and hence there is significant latency between 
the r/w command
           and the start command. */
        /* issue r/w command if the access is to ATA*/
@@ -214,7 +214,7 @@ static void k2_bmdma_start_mmio (struct 
                ap->ops->exec_command(ap, &qc->tf);
 }
 
-                                                                             
+
 static u8 k2_stat_check_status(struct ata_port *ap)
 {
                return readl((void *) ap->ioaddr.status_addr);
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c
--- a/drivers/scsi/sata_sx4.c
+++ b/drivers/scsi/sata_sx4.c
@@ -94,7 +94,7 @@ enum {
        PDC_DIMM1_CONTROL_OFFSET      = 0x84,
        PDC_SDRAM_CONTROL_OFFSET      = 0x88,
        PDC_I2C_WRITE                 = 0x00000000,
-       PDC_I2C_READ                  = 0x00000040,     
+       PDC_I2C_READ                  = 0x00000040,
        PDC_I2C_START                 = 0x00000080,
        PDC_I2C_MASK_INT              = 0x00000020,
        PDC_I2C_COMPLETE              = 0x00010000,
@@ -105,16 +105,16 @@ enum {
        PDC_DIMM_SPD_COLUMN_NUM       = 4,
        PDC_DIMM_SPD_MODULE_ROW       = 5,
        PDC_DIMM_SPD_TYPE             = 11,
-       PDC_DIMM_SPD_FRESH_RATE       = 12,         
-       PDC_DIMM_SPD_BANK_NUM         = 17,     
+       PDC_DIMM_SPD_FRESH_RATE       = 12,
+       PDC_DIMM_SPD_BANK_NUM         = 17,
        PDC_DIMM_SPD_CAS_LATENCY      = 18,
-       PDC_DIMM_SPD_ATTRIBUTE        = 21,    
+       PDC_DIMM_SPD_ATTRIBUTE        = 21,
        PDC_DIMM_SPD_ROW_PRE_CHARGE   = 27,
-       PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28,      
+       PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28,
        PDC_DIMM_SPD_RAS_CAS_DELAY    = 29,
        PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30,
        PDC_DIMM_SPD_SYSTEM_FREQ      = 126,
-       PDC_CTL_STATUS                = 0x08,   
+       PDC_CTL_STATUS                = 0x08,
        PDC_DIMM_WINDOW_CTLR          = 0x0C,
        PDC_TIME_CONTROL              = 0x3C,
        PDC_TIME_PERIOD               = 0x40,
@@ -157,15 +157,15 @@ static void pdc_exec_command_mmio(struct
 static void pdc20621_host_stop(struct ata_host_set *host_set);
 static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe);
 static int pdc20621_detect_dimm(struct ata_probe_ent *pe);
-static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, 
+static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe,
                                      u32 device, u32 subaddr, u32 *pdata);
 static int pdc20621_prog_dimm0(struct ata_probe_ent *pe);
 static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe);
 #ifdef ATA_VERBOSE_DEBUG
-static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, 
+static void pdc20621_get_from_dimm(struct ata_probe_ent *pe,
                                   void *psource, u32 offset, u32 size);
 #endif
-static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, 
+static void pdc20621_put_to_dimm(struct ata_probe_ent *pe,
                                 void *psource, u32 offset, u32 size);
 static void pdc20621_irq_clear(struct ata_port *ap);
 static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc);
@@ -922,7 +922,7 @@ static void pdc_sata_setup_port(struct a
 
 
 #ifdef ATA_VERBOSE_DEBUG
-static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, 
+static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
                                   u32 offset, u32 size)
 {
        u32 window_size;
@@ -936,9 +936,9 @@ static void pdc20621_get_from_dimm(struc
        /* hard-code chip #0 */
        mmio += PDC_CHIP0_OFS;
 
-       page_mask = 0x00;       
-       window_size = 0x2000 * 4; /* 32K byte uchar size */  
-       idx = (u16) (offset / window_size); 
+       page_mask = 0x00;
+       window_size = 0x2000 * 4; /* 32K byte uchar size */
+       idx = (u16) (offset / window_size);
 
        writel(0x01, mmio + PDC_GENERAL_CTLR);
        readl(mmio + PDC_GENERAL_CTLR);
@@ -947,19 +947,19 @@ static void pdc20621_get_from_dimm(struc
 
        offset -= (idx * window_size);
        idx++;
-       dist = ((long) (window_size - (offset + size))) >= 0 ? size : 
+       dist = ((long) (window_size - (offset + size))) >= 0 ? size :
                (long) (window_size - offset);
-       memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), 
+       memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4),
                      dist);
 
-       psource += dist;    
+       psource += dist;
        size -= dist;
        for (; (long) size >= (long) window_size ;) {
                writel(0x01, mmio + PDC_GENERAL_CTLR);
                readl(mmio + PDC_GENERAL_CTLR);
                writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
                readl(mmio + PDC_DIMM_WINDOW_CTLR);
-               memcpy_fromio((char *) psource, (char *) (dimm_mmio), 
+               memcpy_fromio((char *) psource, (char *) (dimm_mmio),
                              window_size / 4);
                psource += window_size;
                size -= window_size;
@@ -971,14 +971,14 @@ static void pdc20621_get_from_dimm(struc
                readl(mmio + PDC_GENERAL_CTLR);
                writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
                readl(mmio + PDC_DIMM_WINDOW_CTLR);
-               memcpy_fromio((char *) psource, (char *) (dimm_mmio), 
+               memcpy_fromio((char *) psource, (char *) (dimm_mmio),
                              size / 4);
        }
 }
 #endif
 
 
-static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, 
+static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
                                 u32 offset, u32 size)
 {
        u32 window_size;
@@ -989,16 +989,16 @@ static void pdc20621_put_to_dimm(struct 
        struct pdc_host_priv *hpriv = pe->private_data;
        void *dimm_mmio = hpriv->dimm_mmio;
 
-       /* hard-code chip #0 */   
+       /* hard-code chip #0 */
        mmio += PDC_CHIP0_OFS;
 
-       page_mask = 0x00;       
-       window_size = 0x2000 * 4;       /* 32K byte uchar size */  
+       page_mask = 0x00;
+       window_size = 0x2000 * 4;       /* 32K byte uchar size */
        idx = (u16) (offset / window_size);
 
        writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
        readl(mmio + PDC_DIMM_WINDOW_CTLR);
-       offset -= (idx * window_size); 
+       offset -= (idx * window_size);
        idx++;
        dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size :
                (long) (window_size - offset);
@@ -1006,12 +1006,12 @@ static void pdc20621_put_to_dimm(struct 
        writel(0x01, mmio + PDC_GENERAL_CTLR);
        readl(mmio + PDC_GENERAL_CTLR);
 
-       psource += dist;    
+       psource += dist;
        size -= dist;
        for (; (long) size >= (long) window_size ;) {
                writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
                readl(mmio + PDC_DIMM_WINDOW_CTLR);
-               memcpy_toio((char *) (dimm_mmio), (char *) psource, 
+               memcpy_toio((char *) (dimm_mmio), (char *) psource,
                            window_size / 4);
                writel(0x01, mmio + PDC_GENERAL_CTLR);
                readl(mmio + PDC_GENERAL_CTLR);
@@ -1019,7 +1019,7 @@ static void pdc20621_put_to_dimm(struct 
                size -= window_size;
                idx ++;
        }
-    
+
        if (size) {
                writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
                readl(mmio + PDC_DIMM_WINDOW_CTLR);
@@ -1030,12 +1030,12 @@ static void pdc20621_put_to_dimm(struct 
 }
 
 
-static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, 
+static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device,
                                      u32 subaddr, u32 *pdata)
 {
        void *mmio = pe->mmio_base;
        u32 i2creg  = 0;
-       u32 status;     
+       u32 status;
        u32 count =0;
 
        /* hard-code chip #0 */
@@ -1049,7 +1049,7 @@ static unsigned int pdc20621_i2c_read(st
        readl(mmio + PDC_I2C_ADDR_DATA_OFFSET);
 
        /* Write Control to perform read operation, mask int */
-       writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, 
+       writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT,
               mmio + PDC_I2C_CONTROL_OFFSET);
 
        for (count = 0; count <= 1000; count ++) {
@@ -1062,26 +1062,26 @@ static unsigned int pdc20621_i2c_read(st
        }
 
        *pdata = (status >> 8) & 0x000000ff;
-       return 1;           
+       return 1;
 }
 
 
 static int pdc20621_detect_dimm(struct ata_probe_ent *pe)
 {
        u32 data=0 ;
-       if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 
+       if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
                             PDC_DIMM_SPD_SYSTEM_FREQ, &data)) {
                if (data == 100)
                        return 100;
        } else
                return 0;
-       
+
        if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) {
-               if(data <= 0x75) 
+               if(data <= 0x75)
                        return 133;
        } else
                return 0;
-       
+
        return 0;
 }
 
@@ -1091,15 +1091,15 @@ static int pdc20621_prog_dimm0(struct at
        u32 spd0[50];
        u32 data = 0;
        int size, i;
-       u8 bdimmsize; 
+       u8 bdimmsize;
        void *mmio = pe->mmio_base;
        static const struct {
                unsigned int reg;
                unsigned int ofs;
        } pdc_i2c_read_data [] = {
-               { PDC_DIMM_SPD_TYPE, 11 },              
+               { PDC_DIMM_SPD_TYPE, 11 },
                { PDC_DIMM_SPD_FRESH_RATE, 12 },
-               { PDC_DIMM_SPD_COLUMN_NUM, 4 }, 
+               { PDC_DIMM_SPD_COLUMN_NUM, 4 },
                { PDC_DIMM_SPD_ATTRIBUTE, 21 },
                { PDC_DIMM_SPD_ROW_NUM, 3 },
                { PDC_DIMM_SPD_BANK_NUM, 17 },
@@ -1108,7 +1108,7 @@ static int pdc20621_prog_dimm0(struct at
                { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 },
                { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 },
                { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 },
-               { PDC_DIMM_SPD_CAS_LATENCY, 18 },       
+               { PDC_DIMM_SPD_CAS_LATENCY, 18 },
        };
 
        /* hard-code chip #0 */
@@ -1116,17 +1116,17 @@ static int pdc20621_prog_dimm0(struct at
 
        for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++)
                pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
-                                 pdc_i2c_read_data[i].reg, 
+                                 pdc_i2c_read_data[i].reg,
                                  &spd0[pdc_i2c_read_data[i].ofs]);
-  
+
        data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);
-       data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | 
+       data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) |
                ((((spd0[27] + 9) / 10) - 1) << 8) ;
-       data |= (((((spd0[29] > spd0[28]) 
-                   ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; 
+       data |= (((((spd0[29] > spd0[28])
+                   ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10;
        data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12;
-   
-       if (spd0[18] & 0x08) 
+
+       if (spd0[18] & 0x08)
                data |= ((0x03) << 14);
        else if (spd0[18] & 0x04)
                data |= ((0x02) << 14);
@@ -1135,7 +1135,7 @@ static int pdc20621_prog_dimm0(struct at
        else
                data |= (0 << 14);
 
-       /* 
+       /*
           Calculate the size of bDIMMSize (power of 2) and
           merge the DIMM size by program start/end address.
        */
@@ -1145,9 +1145,9 @@ static int pdc20621_prog_dimm0(struct at
        data |= (((size / 16) - 1) << 16);
        data |= (0 << 23);
        data |= 8;
-       writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); 
+       writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET);
        readl(mmio + PDC_DIMM0_CONTROL_OFFSET);
-       return size;                          
+       return size;
 }
 
 
@@ -1167,12 +1167,12 @@ static unsigned int pdc20621_prog_dimm_g
          Refresh Enable (bit 17)
        */
 
-       data = 0x022259F1;   
+       data = 0x022259F1;
        writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET);
        readl(mmio + PDC_SDRAM_CONTROL_OFFSET);
 
        /* Turn on for ECC */
-       pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 
+       pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
                          PDC_DIMM_SPD_TYPE, &spd0);
        if (spd0 == 0x02) {
                data |= (0x01 << 16);
@@ -1186,22 +1186,22 @@ static unsigned int pdc20621_prog_dimm_g
        data |= (1<<19);
        writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET);
 
-       error = 1;                     
+       error = 1;
        for (i = 1; i <= 10; i++) {   /* polling ~5 secs */
                data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET);
                if (!(data & (1<<19))) {
                        error = 0;
-                       break;     
+                       break;
                }
                msleep(i*100);
        }
        return error;
 }
-       
+
 
 static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
 {
-       int speed, size, length; 
+       int speed, size, length;
        u32 addr,spd0,pci_status;
        u32 tmp=0;
        u32 time_period=0;
@@ -1228,7 +1228,7 @@ static unsigned int pdc20621_dimm_init(s
        /* Wait 3 seconds */
        msleep(3000);
 
-       /* 
+       /*
           When timer is enabled, counter is decreased every internal
           clock cycle.
        */
@@ -1236,24 +1236,24 @@ static unsigned int pdc20621_dimm_init(s
        tcount = readl(mmio + PDC_TIME_COUNTER);
        VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount);
 
-       /* 
+       /*
           If SX4 is on PCI-X bus, after 3 seconds, the timer counter
           register should be >= (0xffffffff - 3x10^8).
        */
        if(tcount >= PCI_X_TCOUNT) {
                ticks = (time_period - tcount);
                VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks);
-       
+
                clock = (ticks / 300000);
                VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock);
-               
+
                clock = (clock * 33);
                VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock);
 
                /* PLL F Param (bit 22:16) */
                fparam = (1400000 / clock) - 2;
                VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam);
-               
+
                /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */
                pci_status = (0x8a001824 | (fparam << 16));
        } else
@@ -1264,21 +1264,21 @@ static unsigned int pdc20621_dimm_init(s
        writel(pci_status, mmio + PDC_CTL_STATUS);
        readl(mmio + PDC_CTL_STATUS);
 
-       /* 
+       /*
           Read SPD of DIMM by I2C interface,
           and program the DIMM Module Controller.
        */
        if (!(speed = pdc20621_detect_dimm(pe))) {
-               printk(KERN_ERR "Detect Local DIMM Fail\n");  
+               printk(KERN_ERR "Detect Local DIMM Fail\n");
                return 1;       /* DIMM error */
        }
        VPRINTK("Local DIMM Speed = %d\n", speed);
 
-       /* Programming DIMM0 Module Control Register (index_CID0:80h) */ 
+       /* Programming DIMM0 Module Control Register (index_CID0:80h) */
        size = pdc20621_prog_dimm0(pe);
        VPRINTK("Local DIMM Size = %dMB\n",size);
 
-       /* Programming DIMM Module Global Control Register (index_CID0:88h) */ 
+       /* Programming DIMM Module Global Control Register (index_CID0:88h) */
        if (pdc20621_prog_dimm_global(pe)) {
                printk(KERN_ERR "Programming DIMM Module Global Control 
Register Fail\n");
                return 1;
@@ -1297,30 +1297,30 @@ static unsigned int pdc20621_dimm_init(s
 
                pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40);
                pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40);
-               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 
+               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
                       test_parttern2[1], &(test_parttern2[2]));
-               pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, 
+               pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040,
                                       40);
-               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 
+               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
                       test_parttern2[1], &(test_parttern2[2]));
 
                pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40);
                pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40);
-               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 
+               printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
                       test_parttern2[1], &(test_parttern2[2]));
        }
 #endif
 
        /* ECC initiliazation. */
 
-       pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 
+       pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
                          PDC_DIMM_SPD_TYPE, &spd0);
        if (spd0 == 0x02) {
                VPRINTK("Start ECC initialization\n");
                addr = 0;
                length = size * 1024 * 1024;
                while (addr < length) {
-                       pdc20621_put_to_dimm(pe, (void *) &tmp, addr, 
+                       pdc20621_put_to_dimm(pe, (void *) &tmp, addr,
                                             sizeof(u32));
                        addr += sizeof(u32);
                }
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c
--- a/drivers/scsi/sata_uli.c
+++ b/drivers/scsi/sata_uli.c
@@ -214,7 +214,7 @@ static int uli_init_one (struct pci_dev 
                rc = -ENOMEM;
                goto err_out_regions;
        }
-       
+
        switch (board_idx) {
        case uli_5287:
                probe_ent->port[0].scr_addr = ULI5287_BASE;
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
--- a/drivers/scsi/sata_via.c
+++ b/drivers/scsi/sata_via.c
@@ -347,7 +347,7 @@ static int svia_init_one (struct pci_dev
                probe_ent = vt6420_init_probe_ent(pdev);
        else
                probe_ent = vt6421_init_probe_ent(pdev);
-       
+
        if (!probe_ent) {
                printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
                       pci_name(pdev));
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -342,7 +342,7 @@ static int __devinit vsc_sata_init_one (
 
        pci_set_master(pdev);
 
-       /* 
+       /*
         * Config offset 0x98 is "Extended Control and Status Register 0"
         * Default value is (1 << 28).  All bits except bit 28 are reserved in
         * DPA mode.  If bit 28 is set, LED 0 reflects all ports' activity.
diff --git a/include/linux/libata.h b/include/linux/libata.h
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -644,7 +644,7 @@ static inline void scr_write(struct ata_
        ap->ops->scr_write(ap, reg, val);
 }
 
-static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, 
+static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
                                   u32 val)
 {
        ap->ops->scr_write(ap, reg, val);
-
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