tree 0cc1d9e29d6c799b91802938e4ec054f9082d08b
parent 0dffefbf1a26ee0661d47516420d86b485a08e9c
author Nicolas Pitre <[EMAIL PROTECTED]> Thu, 08 Sep 2005 23:07:40 +0100
committer Russell King <[EMAIL PROTECTED]> Thu, 08 Sep 2005 23:07:40 +0100

[ARM] 2892/1: remove gcc workaround for direct access to absolute memory 
addresses

Patch from Nicolas Pitre

It used to make a difference in the gcc-2.95 era.  However these days
modern gcc apparently got better at not being influenced by such constructs
(which is good in general) and therefore such workaround is of no real
advantage anymore.
The good news is that gcc (from version 4.1.0) is now fixed with
regards to the defficiency this workaround was trying to address.
For those interested the patch can easily be backported to older gcc
versions and can be found here:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?r1=1.476&r2=1.478
and also here:
http://savannah.gnu.org/cgi-bin/viewcvs/gcc/gcc/gcc/config/arm/arm.c.diff?r1=text&tr1=1.476&r2=text&tr2=1.478&diff_format=u

Signed-off-by: Nicolas Pitre <[EMAIL PROTECTED]>
Signed-off-by: Russell King <[EMAIL PROTECTED]>

 include/asm-arm/arch-pxa/hardware.h    |   18 +++---------------
 include/asm-arm/arch-sa1100/hardware.h |   18 ++----------------
 2 files changed, 5 insertions(+), 31 deletions(-)

diff --git a/include/asm-arm/arch-pxa/hardware.h 
b/include/asm-arm/arch-pxa/hardware.h
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,24 +44,12 @@
 
 #ifndef __ASSEMBLY__
 
-#if 0
-# define __REG(x)      (*((volatile u32 *)io_p2v(x)))
-#else
-/*
- * This __REG() version gives the same results as the one above,  except
- * that we are fooling gcc somehow so it generates far better and smaller
- * assembly code for access to contigous registers.  It's a shame that gcc
- * doesn't guess this by itself.
- */
-#include <asm/types.h>
-typedef struct { volatile u32 offset[4096]; } __regbase;
-# define __REGP(x)     ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
-# define __REG(x)      __REGP(io_p2v(x))
-#endif
+# define __REG(x)      (*((volatile unsigned long *)io_p2v(x)))
 
 /* With indexed regs we don't want to feed the index through io_p2v()
    especially if it is a variable, otherwise horrible code will result. */
-# define __REG2(x,y)     (*(volatile u32 *)((u32)&__REG(x) + (y)))
+# define __REG2(x,y)   \
+       (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
 
 # define __PREG(x)     (io_v2p((u32)&(x)))
 
diff --git a/include/asm-arm/arch-sa1100/hardware.h 
b/include/asm-arm/arch-sa1100/hardware.h
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -49,23 +49,9 @@
    ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + 
PIO_START )
 
 #ifndef __ASSEMBLY__
-#include <asm/types.h>
 
-#if 0
-# define __REG(x)      (*((volatile u32 *)io_p2v(x)))
-#else
-/*
- * This __REG() version gives the same results as the one above,  except
- * that we are fooling gcc somehow so it generates far better and smaller
- * assembly code for access to contigous registers.  It's a shame that gcc
- * doesn't guess this by itself.
- */
-typedef struct { volatile u32 offset[4096]; } __regbase;
-# define __REGP(x)     ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
-# define __REG(x)      __REGP(io_p2v(x))
-#endif
-
-# define __PREG(x)     (io_v2p((u32)&(x)))
+# define __REG(x)      (*((volatile unsigned long *)io_p2v(x)))
+# define __PREG(x)     (io_v2p((unsigned long)&(x)))
 
 #else
 
-
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