tree 4cc085c47f0824f4b028d6d31eab0f63765615c0
parent 83f7da8acd81354e921ff12d6efbeae5b1a5d6a4
author Frank van Maarseveen <[EMAIL PROTECTED]> Sat, 10 Sep 2005 03:01:46 -0700
committer Linus Torvalds <[EMAIL PROTECTED]> Sat, 10 Sep 2005 03:57:29 -0700

[PATCH] ppc32: Correct an instruction in the boot code

In the flush and invalidate bootcode on PPC4xx we were accidentally using
the wrong instruction.  Use cmplw, which reads from a register like we

Signed-off-by: Tom Rini <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>

 arch/ppc/boot/common/util.S |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
--- a/arch/ppc/boot/common/util.S
+++ b/arch/ppc/boot/common/util.S
@@ -252,7 +252,7 @@ _GLOBAL(flush_instruction_cache)
 1:     dcbf    r0,r3                   # Flush the data cache
        icbi    r0,r3                   # Invalidate the instruction cache
        addi    r3,r3,0x10              # Increment by one cache line
-       cmplwi  cr0,r3,r4               # Are we at the end yet?
+       cmplw   cr0,r3,r4               # Are we at the end yet?
        blt     1b                      # No, keep flushing and invalidating
        /* Enable, invalidate and then disable the L1 icache/dcache. */
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