Commit:     f13c152684a7f99ead26525270ed3e28a1d2467f
Parent:     26c068daf089aa21844236c97d05049b9497cc0a
Author:     Sergei Shtylyov <[EMAIL PROTECTED]>
AuthorDate: Wed Dec 13 00:35:53 2006 -0800
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Wed Dec 13 09:05:55 2006 -0800

    [PATCH] HPT37x: read f_CNT saved by BIOS from port
    The undocumented register BIOS uses for saving f_CNT seems to only be
    mapped to I/O space while all the other HPT3xx regs are dual-mapped.  Looks
    like another HighPoint's dirty trick.  With this patch, the deadly kernel
    oops on the cards having the modern HighPoint BIOSes is now at last gone!
    Signed-off-by: Sergei Shtylyov <[EMAIL PROTECTED]>
    Cc: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
    Cc: Alan Cox <[EMAIL PROTECTED]>
    Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
 drivers/ide/pci/hpt366.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 9fd5080..08119da 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1035,14 +1035,14 @@ static void __devinit hpt37x_clocking(ide_hwif_t *hwif)
         * First try reading the register in which the HighPoint BIOS
         * saves f_CNT value before  reprogramming the DPLL from its
         * default setting (which differs for the various chips).
+        * NOTE: This register is only accessible via I/O space.
+        *
         * In case the signature check fails, we'll have to resort to
         * reading the f_CNT register itself in hopes that nobody has
         * touched the DPLL yet...
-       pci_read_config_dword(dev, 0x70, &temp);
+       temp = inl(pci_resource_start(dev, 4) + 0x90);
        if ((temp & 0xFFFFF000) != 0xABCDE000) {
-               int i;
                printk(KERN_WARNING "HPT37X: no clock data saved by BIOS\n");
                /* Calculate the average value of f_CNT */
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