Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=c041ffb36407897bbc3b7bf87d1fa856ce085cdf
Commit: c041ffb36407897bbc3b7bf87d1fa856ce085cdf
Parent: ab9d90db956dec1a83f4c4ef443df6bdbfc3f25d
Author: Lennert Buytenhek <[EMAIL PROTECTED]>
AuthorDate: Mon Dec 18 01:04:09 2006 +0100
Committer: Russell King <[EMAIL PROTECTED]>
CommitDate: Mon Dec 18 00:14:59 2006 +0000
[ARM] 4057/1: ixp23xx: unconditionally enable hardware coherency
On ixp23xx, it was thought to be necessary to disable coherency to work
around certain silicon errata. This turns out not to be the case --
none of the documented errata workarounds require disabling coherency,
and disabling coherency does not work around any existing errata.
Furthermore, all ixp23xx models do support coherency, so we should just
unconditionally enable coherency for all ixp23xx.
Signed-off-by: Lennert Buytenhek <[EMAIL PROTECTED]>
Signed-off-by: Russell King <[EMAIL PROTECTED]>
---
include/asm-arm/arch-ixp23xx/memory.h | 16 +---------------
1 files changed, 1 insertions(+), 15 deletions(-)
diff --git a/include/asm-arm/arch-ixp23xx/memory.h
b/include/asm-arm/arch-ixp23xx/memory.h
index c85fc06..6d859d7 100644
--- a/include/asm-arm/arch-ixp23xx/memory.h
+++ b/include/asm-arm/arch-ixp23xx/memory.h
@@ -41,21 +41,7 @@
data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \
__phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); })
-/*
- * Coherency support. Only supported on A2 CPUs or on A1
- * systems that have the cache coherency workaround.
- */
-static inline int __ixp23xx_arch_is_coherent(void)
-{
- extern unsigned int processor_id;
-
- if (((processor_id & 15) >= 4) || machine_is_roadrunner())
- return 1;
-
- return 0;
-}
-
-#define arch_is_coherent() __ixp23xx_arch_is_coherent()
+#define arch_is_coherent() 1
#endif
-
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