Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=410f4eae4b33631ace70d84470218f3db302afac
Commit: 410f4eae4b33631ace70d84470218f3db302afac
Parent: fb1d50418ef09a6a43b3928ff78d433914ea954d
Author: Andrew Victor <[EMAIL PROTECTED]>
AuthorDate: Tue Jan 9 08:51:43 2007 +0100
Committer: Russell King <[EMAIL PROTECTED]>
CommitDate: Wed Jan 24 11:59:54 2007 +0000
[ARM] 4085/1: AT91: Header fixes.
Fix two typo's where AT01_* was used instead of AT91_*.
[Patch from Wojtek Kaniewski]
Fix definition of AT91_SMC_EXNWMODE for the SAM9 processors.
[Patch from Wu Xuan]
Signed-off-by: Andrew Victor <[EMAIL PROTECTED]>
Signed-off-by: Russell King <[EMAIL PROTECTED]>
---
include/asm-arm/arch-at91rm9200/at91_rstc.h | 2 +-
.../asm-arm/arch-at91rm9200/at91sam9261_matrix.h | 2 +-
include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | 8 ++++----
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/asm-arm/arch-at91rm9200/at91_rstc.h
b/include/asm-arm/arch-at91rm9200/at91_rstc.h
index ccdc52d..237d3c4 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rstc.h
+++ b/include/asm-arm/arch-at91rm9200/at91_rstc.h
@@ -17,7 +17,7 @@
#define AT91_RSTC_PROCRST (1 << 0) /*
Processor Reset */
#define AT91_RSTC_PERRST (1 << 2) /*
Peripheral Reset */
#define AT91_RSTC_EXTRST (1 << 3) /*
External Reset */
-#define AT01_RSTC_KEY (0xff << 24) /* KEY
Password */
+#define AT91_RSTC_KEY (0xff << 24) /* KEY
Password */
#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller
Status Register */
#define AT91_RSTC_URSTS (1 << 0) /* User
Reset Status */
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
index 270a5dc..ab25f9e 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
+++ b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
@@ -15,7 +15,7 @@
#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration
Register */
#define AT91_MATRIX_RCB0 (1 << 0) /*
Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT01_MATRIX_RCB1 (1 << 1) /*
Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define AT91_MATRIX_RCB1 (1 << 1) /*
Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration
Register 0 */
#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration
Register 1 */
diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
index 7d94968..8ac797e 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
+++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
@@ -110,10 +110,10 @@
#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode
Register for CS n */
#define AT91_SMC_READMODE (1 << 0)
/* Read Mode */
#define AT91_SMC_WRITEMODE (1 << 1)
/* Write Mode */
-#define AT91_SMC_EXNWMODE (3 << 5)
/* NWAIT Mode */
-#define AT91_SMC_EXNWMODE_DISABLE (0 << 5)
-#define AT91_SMC_EXNWMODE_FROZEN (2 << 5)
-#define AT91_SMC_EXNWMODE_READY (3 << 5)
+#define AT91_SMC_EXNWMODE (3 << 4)
/* NWAIT Mode */
+#define AT91_SMC_EXNWMODE_DISABLE (0 << 4)
+#define AT91_SMC_EXNWMODE_FROZEN (2 << 4)
+#define AT91_SMC_EXNWMODE_READY (3 << 4)
#define AT91_SMC_BAT (1 << 8)
/* Byte Access Type */
#define AT91_SMC_BAT_SELECT (0 << 8)
#define AT91_SMC_BAT_WRITE (1 << 8)
-
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