Commit:     30b82ea08c3365a6fc916250ff2ad634717fc81b
Parent:     5d0e600d903caa09e790824cc5812f0d97113b23
Author:     H. Peter Anvin <[EMAIL PROTECTED]>
AuthorDate: Tue Feb 13 13:26:24 2007 +0100
Committer:  Andi Kleen <[EMAIL PROTECTED]>
CommitDate: Tue Feb 13 13:26:24 2007 +0100

    [PATCH] i386: All Transmeta CPUs have constant TSCs
    All Transmeta CPUs ever produced have constant-rate TSCs.
    Signed-off-by: H. Peter Anvin <[EMAIL PROTECTED]>
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
    Cc: Andi Kleen <[EMAIL PROTECTED]>
    Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
 arch/i386/kernel/cpu/transmeta.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/i386/kernel/cpu/transmeta.c b/arch/i386/kernel/cpu/transmeta.c
index 4056fb7..b536e81 100644
--- a/arch/i386/kernel/cpu/transmeta.c
+++ b/arch/i386/kernel/cpu/transmeta.c
@@ -72,6 +72,9 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
        wrmsr(0x80860004, ~0, uk);
        c->x86_capability[0] = cpuid_edx(0x00000001);
        wrmsr(0x80860004, cap_mask, uk);
+       /* All Transmeta CPUs have a constant TSC */
+       set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
        /* If we can run i686 user-space code, call us an i686 */
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