Commit:     8361cd79f2434d43054be894baf08a74dae5f8c0
Parent:     9f271d576a79f74a543c4099a014d8d4eafa737d
Author:     Olaf Hering <[EMAIL PROTECTED]>
AuthorDate: Sat Feb 10 21:36:14 2007 +0100
Committer:  Jeff Garzik <[EMAIL PROTECTED]>
CommitDate: Thu Feb 15 18:04:53 2007 -0500

    add delay around sl82c105_reset_engine calls
    The hald media changed polling does really confuse things.
    Noone knows why the delays are needed, but they give us access to the CD.
    An udelay(50) will give reliable access to the drive, but there is still
    one (or more) EH reset. The drive works without EH resets with udelay(100).
    Signed-off-by: Olaf Hering <[EMAIL PROTECTED]>
    Signed-off-by: Jeff Garzik <[EMAIL PROTECTED]>
 drivers/ata/pata_sl82c105.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index f2fa158..96e890f 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -187,7 +187,9 @@ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
        struct ata_port *ap = qc->ap;
+       udelay(100);
+       udelay(100);
        /* Set the clocks for DMA */
        sl82c105_configure_dmamode(ap, qc->dev);
@@ -216,6 +218,7 @@ static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc)
+       udelay(100);
        /* This will redo the initial setup of the DMA device to matching
           PIO timings */
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