Commit:     4b210faf0944172e55489bef83babf520bccc1c4
Parent:     6fb9c4f87018f90d7aa415c5c8a4b22e6a000c5b
Author:     Matt Reimer <[EMAIL PROTECTED]>
AuthorDate: Mon Feb 12 21:00:32 2007 +0100
Committer:  Russell King <[EMAIL PROTECTED]>
CommitDate: Mon Feb 12 20:58:06 2007 +0000

    [ARM] 4169/1: S3C2410: align to a cache line
    Align the code to the start of the next cache line, rather than the start 
of the next 256-byte page.
    (On i386 and ARM, the ".align" assembler directive takes its first argument 
as the number of low-order bits that must be zero, not the number of words 
comprising a cache line.)
    Supercedes patch 4166.
    Signed-off-by: Matt Reimer <[EMAIL PROTECTED]>
    Acked-by: Ben Dooks <[EMAIL PROTECTED]>
    Signed-off-by: Russell King <[EMAIL PROTECTED]>
 arch/arm/mach-s3c2410/sleep.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index 9179a10..637aaba 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -59,7 +59,7 @@ ENTRY(s3c2410_cpu_suspend)
        b       s3c2410_do_sleep        @
        @@ align next bit of code to cache line
-       .align  8
+       .align  5
        streq   r7, [ r4 ]                      @ SDRAM sleep command
        streq   r8, [ r5 ]                      @ SDRAM power-down config
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