Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=3668b45d46f777b0773ef5ff49531c1144efb6dd
Commit:     3668b45d46f777b0773ef5ff49531c1144efb6dd
Parent:     4434c5c7fd61c6713de882a2272b66f32fe7cac3
Author:     Dan Williams <[EMAIL PROTECTED]>
AuthorDate: Tue Feb 13 17:13:34 2007 +0100
Committer:  Russell King <[EMAIL PROTECTED]>
CommitDate: Sat Feb 17 15:05:40 2007 +0000

    [ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and 
iop13xx
    
    * architecture specific details are handled in asm/arch/time.h
    * ARCH_IOP13XX now selects PLAT_IOP
    * as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on
    XSC3
    
    Signed-off-by: Dan Williams <[EMAIL PROTECTED]>
    Signed-off-by: Russell King <[EMAIL PROTECTED]>
---
 arch/arm/mach-iop13xx/Makefile         |    1 -
 arch/arm/mach-iop13xx/iq81340mc.c      |    5 +-
 arch/arm/mach-iop13xx/iq81340sc.c      |    5 +-
 arch/arm/mach-iop13xx/time.c           |   92 --------------------------------
 arch/arm/mach-iop32x/glantank.c        |    5 +-
 arch/arm/mach-iop32x/iq31244.c         |    8 ++--
 arch/arm/mach-iop32x/iq80321.c         |    5 +-
 arch/arm/mach-iop32x/n2100.c           |    5 +-
 arch/arm/mach-iop33x/iq80331.c         |    7 ++-
 arch/arm/mach-iop33x/iq80332.c         |    7 ++-
 arch/arm/plat-iop/Makefile             |    1 +
 arch/arm/plat-iop/time.c               |   60 ++++++++++++---------
 include/asm-arm/arch-iop13xx/iop13xx.h |   12 ----
 include/asm-arm/arch-iop13xx/time.h    |   51 ++++++++++++++++++
 include/asm-arm/arch-iop32x/time.h     |    4 ++
 include/asm-arm/arch-iop33x/time.h     |    4 ++
 include/asm-arm/hardware/iop3xx.h      |   55 +++++++++++++++----
 17 files changed, 166 insertions(+), 161 deletions(-)

diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
index c3d6c08..4185e05 100644
--- a/arch/arm/mach-iop13xx/Makefile
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -5,7 +5,6 @@ obj-                    :=
 
 obj-$(CONFIG_ARCH_IOP13XX) += setup.o
 obj-$(CONFIG_ARCH_IOP13XX) += irq.o
-obj-$(CONFIG_ARCH_IOP13XX) += time.o
 obj-$(CONFIG_ARCH_IOP13XX) += pci.o
 obj-$(CONFIG_ARCH_IOP13XX) += io.o
 obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c 
b/arch/arm/mach-iop13xx/iq81340mc.c
index 2a1bbfe..a519d70 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -25,6 +25,7 @@
 #include <asm/mach/arch.h>
 #include <asm/arch/pci.h>
 #include <asm/mach/time.h>
+#include <asm/arch/time.h>
 
 extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
 
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void)
 
 static void __init iq81340mc_timer_init(void)
 {
-       iop13xx_init_time(400000000);
+       iop_init_time(400000000);
 }
 
 static struct sys_timer iq81340mc_timer = {
        .init       = iq81340mc_timer_init,
-       .offset     = iop13xx_gettimeoffset,
+       .offset     = iop_gettimeoffset,
 };
 
 MACHINE_START(IQ81340MC, "Intel IQ81340MC")
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c 
b/arch/arm/mach-iop13xx/iq81340sc.c
index 5ad2b62..0e71fbc 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -25,6 +25,7 @@
 #include <asm/mach/arch.h>
 #include <asm/arch/pci.h>
 #include <asm/mach/time.h>
+#include <asm/arch/time.h>
 
 extern int init_atu;
 
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void)
 
 static void __init iq81340sc_timer_init(void)
 {
-       iop13xx_init_time(400000000);
+       iop_init_time(400000000);
 }
 
 static struct sys_timer iq81340sc_timer = {
        .init       = iq81340sc_timer_init,
-       .offset     = iop13xx_gettimeoffset,
+       .offset     = iop_gettimeoffset,
 };
 
 MACHINE_START(IQ81340SC, "Intel IQ81340SC")
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
deleted file mode 100644
index fc9d9d9..0000000
--- a/arch/arm/mach-iop13xx/time.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * arch/arm/mach-iop13xx/time.c
- *
- * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
- *
- * Author: Deepak Saxena <[EMAIL PROTECTED]>
- *
- * Copyright 2002-2003 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/timex.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-
-static unsigned long ticks_per_jiffy;
-static unsigned long ticks_per_usec;
-static unsigned long next_jiffy_time;
-
-static inline u32 read_tcr1(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
-       return val;
-}
-
-unsigned long iop13xx_gettimeoffset(void)
-{
-       unsigned long offset;
-
-       offset = next_jiffy_time - read_tcr1();
-
-       return offset / ticks_per_usec;
-}
-
-static irqreturn_t
-iop13xx_timer_interrupt(int irq, void *dev_id)
-{
-       write_seqlock(&xtime_lock);
-
-       asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
-
-       while ((signed long)(next_jiffy_time - read_tcr1())
-                                                       >= ticks_per_jiffy) {
-               timer_tick();
-               next_jiffy_time -= ticks_per_jiffy;
-       }
-
-       write_sequnlock(&xtime_lock);
-
-       return IRQ_HANDLED;
-}
-
-static struct irqaction iop13xx_timer_irq = {
-       .name           = "IOP13XX Timer Tick",
-       .handler        = iop13xx_timer_interrupt,
-       .flags          = IRQF_DISABLED | IRQF_TIMER,
-};
-
-void __init iop13xx_init_time(unsigned long tick_rate)
-{
-       u32 timer_ctl;
-
-       ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
-       ticks_per_usec = tick_rate / 1000000;
-       next_jiffy_time = 0xffffffff;
-
-       timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
-                       IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
-
-       /*
-        * We use timer 0 for our timer interrupt, and timer 1 as
-        * monotonic counter for tracking missed jiffies.
-        */
-       asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
-       asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
-       asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
-       asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
-
-       setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
-}
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index b9b7650..45f4f13 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -31,6 +31,7 @@
 #include <asm/mach/time.h>
 #include <asm/mach-types.h>
 #include <asm/page.h>
+#include <asm/arch/time.h>
 
 /*
  * GLAN Tank timer tick configuration.
@@ -38,12 +39,12 @@
 static void __init glantank_timer_init(void)
 {
        /* 33.333 MHz crystal.  */
-       iop3xx_init_time(200000000);
+       iop_init_time(200000000);
 }
 
 static struct sys_timer glantank_timer = {
        .init           = glantank_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index be4aedf..571ac35 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -36,7 +36,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-
+#include <asm/arch/time.h>
 
 /*
  * The EP80219 and IQ31244 use the same machine ID.  To find out
@@ -56,16 +56,16 @@ static void __init iq31244_timer_init(void)
 {
        if (is_80219()) {
                /* 33.333 MHz crystal.  */
-               iop3xx_init_time(200000000);
+               iop_init_time(200000000);
        } else {
                /* 33.000 MHz crystal.  */
-               iop3xx_init_time(198000000);
+               iop_init_time(198000000);
        }
 }
 
 static struct sys_timer iq31244_timer = {
        .init           = iq31244_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 1f37b55..361c70c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -33,6 +33,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
+#include <asm/arch/time.h>
 
 /*
  * IQ80321 timer tick configuration.
@@ -40,12 +41,12 @@
 static void __init iq80321_timer_init(void)
 {
        /* 33.333 MHz crystal.  */
-       iop3xx_init_time(200000000);
+       iop_init_time(200000000);
 }
 
 static struct sys_timer iq80321_timer = {
        .init           = iq80321_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 2499a77..92fa0c5 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -37,6 +37,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
+#include <asm/arch/time.h>
 
 /*
  * N2100 timer tick configuration.
@@ -44,12 +45,12 @@
 static void __init n2100_timer_init(void)
 {
        /* 33.000 MHz crystal.  */
-       iop3xx_init_time(198000000);
+       iop_init_time(198000000);
 }
 
 static struct sys_timer n2100_timer = {
        .init           = n2100_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 97a7b74..1a9e361 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -32,6 +32,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
+#include <asm/arch/time.h>
 
 /*
  * IQ80331 timer tick configuration.
@@ -40,14 +41,14 @@ static void __init iq80331_timer_init(void)
 {
        /* D-Step parts run at a higher internal bus frequency */
        if (*IOP3XX_ATURID >= 0xa)
-               iop3xx_init_time(333000000);
+               iop_init_time(333000000);
        else
-               iop3xx_init_time(266000000);
+               iop_init_time(266000000);
 }
 
 static struct sys_timer iq80331_timer = {
        .init           = iq80331_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 9887bfc..96d6f0f 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -32,6 +32,7 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
+#include <asm/arch/time.h>
 
 /*
  * IQ80332 timer tick configuration.
@@ -40,14 +41,14 @@ static void __init iq80332_timer_init(void)
 {
        /* D-Step parts and the iop333 run at a higher internal bus frequency */
        if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374)
-               iop3xx_init_time(333000000);
+               iop_init_time(333000000);
        else
-               iop3xx_init_time(266000000);
+               iop_init_time(266000000);
 }
 
 static struct sys_timer iq80332_timer = {
        .init           = iq80332_timer_init,
-       .offset         = iop3xx_gettimeoffset,
+       .offset         = iop_gettimeoffset,
 };
 
 
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 3250d73..4d2b1da 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += cp6.o
 
 # IOP13XX
 obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
+obj-$(CONFIG_ARCH_IOP13XX) += time.o
 
 obj-m                  :=
 obj-n                  :=
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 0d53b81..16300ad 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -24,37 +24,45 @@
 #include <asm/uaccess.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
-
-#ifdef CONFIG_ARCH_IOP32X
-#define IRQ_IOP3XX_TIMER0      IRQ_IOP32X_TIMER0
-#else
-#ifdef CONFIG_ARCH_IOP33X
-#define IRQ_IOP3XX_TIMER0      IRQ_IOP33X_TIMER0
-#endif
-#endif
+#include <asm/arch/time.h>
 
 static unsigned long ticks_per_jiffy;
 static unsigned long ticks_per_usec;
 static unsigned long next_jiffy_time;
 
-unsigned long iop3xx_gettimeoffset(void)
+unsigned long iop_gettimeoffset(void)
 {
-       unsigned long offset;
+       unsigned long offset, temp1, temp2;
+
+       /* enable cp6, if necessary, to avoid taking the overhead of an
+        * undefined instruction trap
+        */
+       asm volatile (
+       "mrc    p15, 0, %0, c15, c1, 0\n\t"
+       "ands   %1, %0, #(1 << 6)\n\t"
+       "orreq  %0, %0, #(1 << 6)\n\t"
+       "mcreq  p15, 0, %0, c15, c1, 0\n\t"
+#ifdef CONFIG_XSCALE
+       "mrceq  p15, 0, %0, c15, c1, 0\n\t"
+       "moveq  %0, %0\n\t"
+       "subeq  pc, pc, #4\n\t"
+#endif
+       : "=r"(temp1), "=r"(temp2) : : "cc");
 
-       offset = next_jiffy_time - *IOP3XX_TU_TCR1;
+       offset = next_jiffy_time - read_tcr1();
 
        return offset / ticks_per_usec;
 }
 
 static irqreturn_t
-iop3xx_timer_interrupt(int irq, void *dev_id)
+iop_timer_interrupt(int irq, void *dev_id)
 {
        write_seqlock(&xtime_lock);
 
-       asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
+       write_tisr(1);
 
-       while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
-                                                       >= ticks_per_jiffy) {
+       while ((signed long)(next_jiffy_time - read_tcr1())
+               >= ticks_per_jiffy) {
                timer_tick();
                next_jiffy_time -= ticks_per_jiffy;
        }
@@ -64,13 +72,13 @@ iop3xx_timer_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-static struct irqaction iop3xx_timer_irq = {
-       .name           = "IOP3XX Timer Tick",
-       .handler        = iop3xx_timer_interrupt,
+static struct irqaction iop_timer_irq = {
+       .name           = "IOP Timer Tick",
+       .handler        = iop_timer_interrupt,
        .flags          = IRQF_DISABLED | IRQF_TIMER,
 };
 
-void __init iop3xx_init_time(unsigned long tick_rate)
+void __init iop_init_time(unsigned long tick_rate)
 {
        u32 timer_ctl;
 
@@ -78,17 +86,17 @@ void __init iop3xx_init_time(unsigned long tick_rate)
        ticks_per_usec = tick_rate / 1000000;
        next_jiffy_time = 0xffffffff;
 
-       timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED |
-                       IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1;
+       timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
+                       IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
 
        /*
         * We use timer 0 for our timer interrupt, and timer 1 as
         * monotonic counter for tracking missed jiffies.
         */
-       asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
-       asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
-       asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
-       asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
+       write_trr0(ticks_per_jiffy - 1);
+       write_tmr0(timer_ctl);
+       write_trr1(0xffffffff);
+       write_tmr1(timer_ctl);
 
-       setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
+       setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
 }
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h 
b/include/asm-arm/arch-iop13xx/iop13xx.h
index e743059..d26b755 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -9,8 +9,6 @@ void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_init_irq(void);
-void iop13xx_init_time(unsigned long tickrate);
-unsigned long iop13xx_gettimeoffset(void);
 
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
@@ -453,14 +451,4 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PBI_BAR1               IOP13XX_PBI_OFFSET(0x10)
 #define IOP13XX_PBI_LR1                IOP13XX_PBI_OFFSET(0x14)
 
-#define IOP13XX_TMR_TC                 0x01
-#define IOP13XX_TMR_EN                 0x02
-#define IOP13XX_TMR_RELOAD             0x04
-#define IOP13XX_TMR_PRIVILEGED         0x08
-
-#define IOP13XX_TMR_RATIO_1_1          0x00
-#define IOP13XX_TMR_RATIO_4_1          0x10
-#define IOP13XX_TMR_RATIO_8_1          0x20
-#define IOP13XX_TMR_RATIO_16_1         0x30
-
 #endif /* _IOP13XX_HW_H_ */
diff --git a/include/asm-arm/arch-iop13xx/time.h 
b/include/asm-arm/arch-iop13xx/time.h
new file mode 100644
index 0000000..77a837a
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/time.h
@@ -0,0 +1,51 @@
+#ifndef _IOP13XX_TIME_H_
+#define _IOP13XX_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
+
+#define IOP_TMR_EN         0x02
+#define IOP_TMR_RELOAD     0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1  0x00
+
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
+
+static inline void write_tmr0(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
+}
+
+static inline void write_tmr1(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val));
+}
+
+static inline u32 read_tcr0(void)
+{
+       u32 val;
+       asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val));
+       return val;
+}
+
+static inline u32 read_tcr1(void)
+{
+       u32 val;
+       asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
+       return val;
+}
+
+static inline void write_trr0(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val));
+}
+
+static inline void write_trr1(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val));
+}
+
+static inline void write_tisr(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val));
+}
+#endif
diff --git a/include/asm-arm/arch-iop32x/time.h 
b/include/asm-arm/arch-iop32x/time.h
new file mode 100644
index 0000000..0f28c99
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/time.h
@@ -0,0 +1,4 @@
+#ifndef _IOP32X_TIME_H_
+#define _IOP32X_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
+#endif
diff --git a/include/asm-arm/arch-iop33x/time.h 
b/include/asm-arm/arch-iop33x/time.h
new file mode 100644
index 0000000..4ac4d76
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/time.h
@@ -0,0 +1,4 @@
+#ifndef _IOP33X_TIME_H_
+#define _IOP33X_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP33X_TIMER0
+#endif
diff --git a/include/asm-arm/hardware/iop3xx.h 
b/include/asm-arm/hardware/iop3xx.h
index 47fcbf6..15141a9 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -188,14 +188,10 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_TU_TRR1         (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
 #define IOP3XX_TU_TISR         (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
 #define IOP3XX_TU_WDTCR                (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
-#define IOP3XX_TMR_TC          0x01
-#define IOP3XX_TMR_EN          0x02
-#define IOP3XX_TMR_RELOAD      0x04
-#define IOP3XX_TMR_PRIVILEGED  0x09
-#define IOP3XX_TMR_RATIO_1_1   0x00
-#define IOP3XX_TMR_RATIO_4_1   0x10
-#define IOP3XX_TMR_RATIO_8_1   0x20
-#define IOP3XX_TMR_RATIO_16_1  0x30
+#define IOP_TMR_EN         0x02
+#define IOP_TMR_RELOAD     0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1  0x00
 
 /* Application accelerator unit  */
 #define IOP3XX_AAU_ACR         (volatile u32 *)IOP3XX_REG_ADDR(0x0800)
@@ -276,9 +272,48 @@ extern void gpio_line_set(int line, int value);
 
 #ifndef __ASSEMBLY__
 void iop3xx_map_io(void);
-void iop3xx_init_time(unsigned long);
-unsigned long iop3xx_gettimeoffset(void);
 void iop_init_cp6_handler(void);
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
+
+static inline void write_tmr0(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
+}
+
+static inline void write_tmr1(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
+}
+
+static inline u32 read_tcr0(void)
+{
+       u32 val;
+       asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
+       return val;
+}
+
+static inline u32 read_tcr1(void)
+{
+       u32 val;
+       asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
+       return val;
+}
+
+static inline void write_trr0(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
+}
+
+static inline void write_trr1(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
+}
+
+static inline void write_tisr(u32 val)
+{
+       asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
+}
 
 extern struct platform_device iop3xx_i2c0_device;
 extern struct platform_device iop3xx_i2c1_device;
-
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