Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=5f1545bc45a33361d6bb2fb44af7c35bcd733b9d
Commit:     5f1545bc45a33361d6bb2fb44af7c35bcd733b9d
Parent:     a8a5d06775f54ab2d23ad6455db399c15a664feb
Author:     Joachim Deguara <[EMAIL PROTECTED]>
AuthorDate: Fri Mar 16 15:01:36 2007 +0100
Committer:  Jaroslav Kysela <[EMAIL PROTECTED]>
CommitDate: Fri Mar 16 15:02:15 2007 +0100

    [ALSA] hda-intel - Fix HDA buffer alignment
    
    From the HDA spec it appears that the buffers written to the BDL and
    sent to a codec must be 128 byte aligned (section 4.5.1).  The alignment
    was not happening especially when playing 6 channels.  This patch set
    the alignment of buffers and periods to 128 bytes.
    
    Signed-off-by: Joachim Deguara <[EMAIL PROTECTED]>
    Signed-off-by: Takashi Iwai <[EMAIL PROTECTED]>
    Signed-off-by: Jaroslav Kysela <[EMAIL PROTECTED]>
---
 sound/pci/hda/hda_intel.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 13e4837..1672cac 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1087,6 +1087,10 @@ static int azx_pcm_open(struct snd_pcm_substream 
*substream)
        runtime->hw.rates = hinfo->rates;
        snd_pcm_limit_hw_rates(runtime);
        snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
+       snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+                                  128);
+       snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+                                  128);
        if ((err = hinfo->ops.open(hinfo, apcm->codec, substream)) < 0) {
                azx_release_device(azx_dev);
                mutex_unlock(&chip->open_mutex);
-
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