Commit:     cf6387daf8858bdcb3e123034ca422e8979d73f1
Parent:     c445a31cd7f469d77acc37538ab43a99530968b8
Author:     Joachim Deguara <[EMAIL PROTECTED]>
AuthorDate: Tue Apr 24 13:05:36 2007 +0200
Committer:  Andi Kleen <[EMAIL PROTECTED]>
CommitDate: Tue Apr 24 13:05:36 2007 +0200

    [PATCH] x86-64: make GART PTEs uncacheable
    This patches fixes the silent data corruption problems being seen using the
    GART iommu where 4kB of data where incorrect (seen mostly on Nvidia CK804
    systems).  This fix, to mark the memory regin the GART PTEs reside on as
    uncacheable, also brings the code in line with the AGP specification.
    Signed-off-by: Joachim Deguara <[EMAIL PROTECTED]>
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
 arch/x86_64/kernel/pci-gart.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index 2bac8c6..0bae862 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -519,7 +519,11 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
        gatt_size = (aper_size >> PAGE_SHIFT) * sizeof(u32); 
        gatt = (void *)__get_free_pages(GFP_KERNEL, get_order(gatt_size)); 
        if (!gatt) 
-               panic("Cannot allocate GATT table"); 
+               panic("Cannot allocate GATT table");
+       if (change_page_attr_addr((unsigned long)gatt, gatt_size >> PAGE_SHIFT, 
+               panic("Could not set GART PTEs to uncacheable pages");
+       global_flush_tlb();
        memset(gatt, 0, gatt_size); 
        agp_gatt_table = gatt;
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