Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=068d9f6eb9369a00eb45be91c07653cfef65f4a0
Commit:     068d9f6eb9369a00eb45be91c07653cfef65f4a0
Parent:     9c8f8e752431f3f7ed6ea6ea6e491ce12057f572
Author:     Hans-Christian Egtvedt <[EMAIL PROTECTED]>
AuthorDate: Wed Jan 31 18:01:45 2007 +0100
Committer:  Haavard Skinnemoen <[EMAIL PROTECTED]>
CommitDate: Fri Apr 27 13:43:27 2007 +0200

    [AVR32] Add nwait and tdf parameters to SMC configuration
    
    Complete the SMC configuration code by adding nwait and tdf
    parameter. After this change, we support the same parameters as the
    hardware.
    
    Signed-off-by: Haavard Skinnemoen <[EMAIL PROTECTED]>
---
 arch/avr32/mach-at32ap/hsmc.c       |   23 +++++++++++++++++++++++
 include/asm-avr32/arch-at32ap/smc.h |   22 ++++++++++++++++++++++
 2 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 7691721..5e22a75 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config 
*config)
                return -EINVAL;
        }
 
+       switch (config->nwait_mode) {
+       case 0:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
+               break;
+       case 1:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
+               break;
+       case 2:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
+               break;
+       case 3:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       if (config->tdf_cycles) {
+               mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
+       }
+
        if (config->nrd_controlled)
                mode |= HSMC_BIT(READ_MODE);
        if (config->nwe_controlled)
                mode |= HSMC_BIT(WRITE_MODE);
        if (config->byte_write)
                mode |= HSMC_BIT(BAT);
+       if (config->tdf_mode)
+               mode |= HSMC_BIT(TDF_MODE);
 
        pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
                 cs, setup, pulse, cycle, mode);
diff --git a/include/asm-avr32/arch-at32ap/smc.h 
b/include/asm-avr32/arch-at32ap/smc.h
index 3732b32..07152b7 100644
--- a/include/asm-avr32/arch-at32ap/smc.h
+++ b/include/asm-avr32/arch-at32ap/smc.h
@@ -48,10 +48,32 @@ struct smc_config {
        unsigned int    nwe_controlled:1;
 
        /*
+        * 0: NWAIT is disabled
+        * 1: Reserved
+        * 2: NWAIT is frozen mode
+        * 3: NWAIT in ready mode
+        */
+       unsigned int    nwait_mode:2;
+
+       /*
         * 0: Byte select access type
         * 1: Byte write access type
         */
        unsigned int    byte_write:1;
+
+       /*
+        * Number of clock cycles before data is released after
+        * the rising edge of the read controlling signal
+        *
+        * Total cycles from SMC is tdf_cycles + 1
+        */
+       unsigned int    tdf_cycles:4;
+
+       /*
+        * 0: TDF optimization disabled
+        * 1: TDF optimization enabled
+        */
+       unsigned int    tdf_mode:1;
 };
 
 extern int smc_set_configuration(int cs, const struct smc_config *config);
-
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