Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=50cf67075ba071e0532ccc657ad64cfbb2da3c7a
Commit:     50cf67075ba071e0532ccc657ad64cfbb2da3c7a
Parent:     1c2de47cd47daa033251dbb4a3643e7e87a681b0
Author:     Dave Jiang <[EMAIL PROTECTED]>
AuthorDate: Thu May 10 10:03:05 2007 -0700
Committer:  Paul Mackerras <[EMAIL PROTECTED]>
CommitDate: Thu May 17 21:10:16 2007 +1000

    [POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
    
    Adding memory-controller and l2-cache-controller entries to be used by EDAC
    as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS.
    
    Also fixed up the size of the PCI node on MPC8560 ADS.
    
    Signed-off-by: Dave Jiang <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 arch/powerpc/boot/dts/mpc8540ads.dts |   16 ++++++++++++++++
 arch/powerpc/boot/dts/mpc8548cds.dts |   16 ++++++++++++++++
 arch/powerpc/boot/dts/mpc8560ads.dts |   18 +++++++++++++++++-
 3 files changed, 49 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts 
b/arch/powerpc/boot/dts/mpc8540ads.dts
index f261d64..d91e81c 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -48,6 +48,22 @@
                reg = <e0000000 00100000>;      // CCSRBAR 1M
                bus-frequency = <0>;
 
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8540-memory-controller";
+                       reg = <2000 1000>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <2 2>;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8540-l2-cache-controller";
+                       reg = <20000 1000>;
+                       cache-line-size = <20>; // 32 bytes
+                       cache-size = <40000>;   // L2, 256K
+                       interrupt-parent = <&mpic>;
+                       interrupts = <0 2>;
+               };
+
                [EMAIL PROTECTED] {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts 
b/arch/powerpc/boot/dts/mpc8548cds.dts
index b2b2200..ad96381 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -48,6 +48,22 @@
                reg = <e0000000 00100000>;      // CCSRBAR 1M
                bus-frequency = <0>;
 
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8548-memory-controller";
+                       reg = <2000 1000>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <2 2>;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8548-l2-cache-controller";
+                       reg = <20000 1000>;
+                       cache-line-size = <20>; // 32 bytes
+                       cache-size = <80000>;   // L2, 512K
+                       interrupt-parent = <&mpic>;
+                       interrupts = <0 2>;
+               };
+
                [EMAIL PROTECTED] {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts 
b/arch/powerpc/boot/dts/mpc8560ads.dts
index 1f2afe9..8068215 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -48,6 +48,22 @@
                reg = <e0000000 00000200>;
                bus-frequency = <13ab6680>;
 
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8540-memory-controller";
+                       reg = <2000 1000>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <2 2>;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8540-l2-cache-controller";
+                       reg = <20000 1000>;
+                       cache-line-size = <20>; // 32 bytes
+                       cache-size = <40000>;   // L2, 256K
+                       interrupt-parent = <&mpic>;
+                       interrupts = <0 2>;
+               };
+
                [EMAIL PROTECTED] {
                        device_type = "mdio";
                        compatible = "gianfar";
@@ -110,7 +126,7 @@
                        #address-cells = <3>;
                        compatible = "85xx";
                        device_type = "pci";
-                       reg = <8000 400>;
+                       reg = <8000 1000>;
                        clock-frequency = <3f940aa>;
                        interrupt-map-mask = <f800 0 0 7>;
                        interrupt-map = <
-
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