Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=d1b945fdb62f3e6852fea5a8779c0151ac1e55a8
Commit:     d1b945fdb62f3e6852fea5a8779c0151ac1e55a8
Parent:     9ae246cd85e05d3fb31b9770588c1fe0914872fe
Author:     Michael Hennerich <[EMAIL PROTECTED]>
AuthorDate: Mon May 21 18:09:16 2007 +0800
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Mon May 21 09:50:21 2007 -0700

    Blackfin arch: Move write to VR_CTL closer to IDLE
    
    Signed-off-by: Michael Hennerich <[EMAIL PROTECTED]>
    Signed-off-by: Bryan Wu <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
---
 include/asm-blackfin/mach-bf533/cdefBF532.h |    6 ++++--
 include/asm-blackfin/mach-bf537/cdefBF534.h |    6 ++++--
 include/asm-blackfin/mach-bf561/cdefBF561.h |    6 ++++--
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h 
b/include/asm-blackfin/mach-bf533/cdefBF532.h
index 1d7c494..521bdb4 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -63,12 +63,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h 
b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 7b658c1..9a167f3 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -51,12 +51,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h 
b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 5dc0ed8..b14f872 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -59,12 +59,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SICA_IWR0);
        /* Only allow PPL Wakeup) */
        bfin_write32(SICA_IWR0, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);
-
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