Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=c12ceb766eb5ac975c1145d51236fcdcf81a6578
Commit:     c12ceb766eb5ac975c1145d51236fcdcf81a6578
Parent:     21124a82bb82e100369846ff2044dd5ea65fc934
Author:     Andi Kleen <[EMAIL PROTECTED]>
AuthorDate: Mon May 21 14:31:47 2007 +0200
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Mon May 21 09:56:57 2007 -0700

    i386: Clear MCE flag on AMD K6
    
    It reports machine check capability in CPUID, but doesn't actually
    implement all the necessary MSRs of the standard Intel machine
    check architecture.
    
    This fixes a boot failure on K6s recently introduced.
    
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
---
 arch/i386/kernel/cpu/amd.c       |    4 ++++
 arch/i386/kernel/cpu/mcheck/k7.c |    6 +++---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 4fec702..6f47eee 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 
        if (c->x86 == 0x10 && !force_mwait)
                clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
+
+       /* K6s reports MCEs but don't actually have all the MSRs */
+       if (c->x86 < 6)
+               clear_bit(X86_FEATURE_MCE, c->x86_capability);
 }
 
 static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned 
int size)
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c
index f9fa414..eef63e3 100644
--- a/arch/i386/kernel/cpu/mcheck/k7.c
+++ b/arch/i386/kernel/cpu/mcheck/k7.c
@@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
        u32 l, h;
        int i;
 
-       machine_check_vector = k7_machine_check;
-       wmb();
-
        if (!cpu_has(c, X86_FEATURE_MCE))
                return;
 
+       machine_check_vector = k7_machine_check;
+       wmb();
+
        printk (KERN_INFO "Intel machine check architecture supported.\n");
        rdmsr (MSR_IA32_MCG_CAP, l, h);
        if (l & (1<<8)) /* Control register present ? */
-
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