Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=d23a13779f14808b54181d31222e6c44532abd80
Commit:     d23a13779f14808b54181d31222e6c44532abd80
Parent:     5fea2a4dabdfa1ad59845c42ea770ee8cb41ecad
Author:     Vladimir Barinov <[EMAIL PROTECTED]>
AuthorDate: Wed May 23 20:07:48 2007 +0400
Committer:  Greg Kroah-Hartman <[EMAIL PROTECTED]>
CommitDate: Thu Jul 12 16:34:29 2007 -0700

    USB: EHCI: Safe endianness for transfer buffers after reset in case of HUB 
with TT
    
    This patch fixes the endianness select for transfer buffers in EHCI
    controllers that have Transaction Translator built in the hub.  Also I
    cleaned it up to make rid of magic numbers.
    
    Signed-off-by: Vladimir Barinov <[EMAIL PROTECTED]>
    Cc: <[EMAIL PROTECTED]>
    Signed-off-by: Greg Kroah-Hartman <[EMAIL PROTECTED]>
---
 drivers/usb/host/ehci-hcd.c |   10 ++++++++--
 drivers/usb/host/ehci.h     |    6 ++++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 889c202..a205a53 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -201,9 +201,15 @@ static void tdi_reset (struct ehci_hcd *ehci)
        u32 __iomem     *reg_ptr;
        u32             tmp;
 
-       reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
+       reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
        tmp = ehci_readl(ehci, reg_ptr);
-       tmp |= 0x3;
+       tmp |= USBMODE_CM_HC;
+       /* The default byte access to MMR space is LE after
+        * controller reset. Set the required endian mode
+        * for transfer buffers to match the host microprocessor
+        */
+       if (ehci_big_endian_mmio(ehci))
+               tmp |= USBMODE_BE;
        ehci_writel(ehci, tmp, reg_ptr);
 }
 
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 4d61710..2c68a04 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -302,6 +302,12 @@ struct ehci_regs {
 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_OCC)
 } __attribute__ ((packed));
 
+#define USBMODE                0x68            /* USB Device mode */
+#define USBMODE_SDIS   (1<<3)          /* Stream disable */
+#define USBMODE_BE     (1<<2)          /* BE/LE endianness select */
+#define USBMODE_CM_HC  (3<<0)          /* host controller mode */
+#define USBMODE_CM_IDLE        (0<<0)          /* idle state */
+
 /* Appendix C, Debug port ... intended for use with special "debug devices"
  * that can help if there's no serial console.  (nonstandard enumeration.)
  */
-
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