Commit:     698ca47e8dba93f4b001b06b4c7037b09ac6eb09
Parent:     78961a5740374a8143f8fe120300f2ed160dd276
Author:     Clifford Wolf <[EMAIL PROTECTED]>
AuthorDate: Tue Jul 17 04:04:06 2007 -0700
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Tue Jul 17 10:23:04 2007 -0700

    spi_mpc83xx.c underclocking hotfix
    The MPC83xx SPI controller clock divider can divide the system clock by not
    more then 1024.  The spi_mpc83xx driver does not check this and silently
    writes garbage to the SPI controller registers when asked to run at lower
    frequencies.  I've tried to run the SPI on a 266MHz MPC8349E with 100kHz
    for debugging a bus problem and suddenly was confronted with a 2nd problem
    to debug..  ;-)
    The patch adds an additional check which avoids writing garbage to the SPI
    controller registers and warn the user about it.  This might help others to
    avoid simmilar problems.
    Cc: Kumar Gala <[EMAIL PROTECTED]>
    Cc: David Brownell <[EMAIL PROTECTED]>
    Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
 drivers/spi/spi_mpc83xx.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 9cdbc12..bbd51bc 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -158,6 +158,12 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, 
int value)
                if ((mpc83xx_spi->sysclk / spi->max_speed_hz) >= 64) {
                        u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 64);
+                       if (pm > 0x0f) {
+                               printk(KERN_WARNING "MPC83xx SPI: SPICLK can't 
be less then a SYSCLK/1024!\n"
+                                               "Requested SPICLK is %d Hz. 
Will use %d Hz instead.\n",
+                                               spi->max_speed_hz, 
mpc83xx_spi->sysclk / 1024);
+                               pm = 0x0f;
+                       }
                        regval |= SPMODE_PM(pm) | SPMODE_DIV16;
                } else {
                        u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 4);
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