Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=23d5ea5d3edcfe899cd91fca87a4af799bcc5794
Commit:     23d5ea5d3edcfe899cd91fca87a4af799bcc5794
Parent:     b8da0d1c27f144bce999c653467106f3f0d5a308
Author:     Stephane Eranian <[EMAIL PROTECTED]>
AuthorDate: Thu Sep 6 16:59:51 2007 +0200
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Mon Sep 10 18:57:47 2007 -0700

    i386: Fix perfctr watchdog on core duo
    
    Fix the NMI watchdog on Intel CoreDuo processor where the kernel would
    get stuck during boot.  The issue is related to errata AE49, where the
    PERFEVTSEL1 counter does not have a working enable bit.  Thus it is not
    possible to use it for NMI.
    
    The patch creates a dedicated wd_ops for CoreDuo which falls back to
    using PERFEVTSEL0.  The other Intel processors supporting the
    architectural PMU will keep on using PERFEVTSEL1 as this allows other
    subsystems, such as perfmon, to use PERFEVTSEL0 for PEBS monitoring in
    particular.  Bug initially reported by Daniel Walker.
    
    AK: Added comments
    
    Signed-off-by: Stephane Eranian <[EMAIL PROTECTED]>
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
---
 arch/i386/kernel/cpu/perfctr-watchdog.c |   28 ++++++++++++++++++++++------
 1 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c 
b/arch/i386/kernel/cpu/perfctr-watchdog.c
index 4be488e..93fecd4 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/i386/kernel/cpu/perfctr-watchdog.c
@@ -263,8 +263,8 @@ static int setup_k7_watchdog(unsigned nmi_hz)
        unsigned int evntsel;
        struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
 
-       perfctr_msr = MSR_K7_PERFCTR0;
-       evntsel_msr = MSR_K7_EVNTSEL0;
+       perfctr_msr = wd_ops->perfctr;
+       evntsel_msr = wd_ops->evntsel;
 
        wrmsrl(perfctr_msr, 0UL);
 
@@ -343,8 +343,8 @@ static int setup_p6_watchdog(unsigned nmi_hz)
        unsigned int evntsel;
        struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
 
-       perfctr_msr = MSR_P6_PERFCTR0;
-       evntsel_msr = MSR_P6_EVNTSEL0;
+       perfctr_msr = wd_ops->perfctr;
+       evntsel_msr = wd_ops->evntsel;
 
        /* KVM doesn't implement this MSR */
        if (wrmsr_safe(perfctr_msr, 0, 0) < 0)
@@ -569,8 +569,8 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
            (ebx & ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT))
                return 0;
 
-       perfctr_msr = MSR_ARCH_PERFMON_PERFCTR1;
-       evntsel_msr = MSR_ARCH_PERFMON_EVENTSEL1;
+       perfctr_msr = wd_ops->perfctr;
+       evntsel_msr = wd_ops->evntsel;
 
        wrmsrl(perfctr_msr, 0UL);
 
@@ -605,6 +605,16 @@ static struct wd_ops intel_arch_wd_ops = {
        .evntsel = MSR_ARCH_PERFMON_EVENTSEL1,
 };
 
+static struct wd_ops coreduo_wd_ops = {
+       .reserve = single_msr_reserve,
+       .unreserve = single_msr_unreserve,
+       .setup = setup_intel_arch_watchdog,
+       .rearm = p6_rearm,
+       .stop = single_msr_stop_watchdog,
+       .perfctr = MSR_ARCH_PERFMON_PERFCTR0,
+       .evntsel = MSR_ARCH_PERFMON_EVENTSEL0,
+};
+
 static void probe_nmi_watchdog(void)
 {
        switch (boot_cpu_data.x86_vendor) {
@@ -615,6 +625,12 @@ static void probe_nmi_watchdog(void)
                wd_ops = &k7_wd_ops;
                break;
        case X86_VENDOR_INTEL:
+               /* Work around Core Duo (Yonah) errata AE49 where perfctr1
+                  doesn't have a working enable bit. */
+               if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 14) {
+                       wd_ops = &coreduo_wd_ops;
+                       break;
+               }
                if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
                        wd_ops = &intel_arch_wd_ops;
                        break;
-
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