Commit:     36c50f729b77144cae8d43457fefca66a4eeff6a
Parent:     2af8569dc9f29c303bf4aa012d991afcfaeed0c3
Author:     Jochen Friedrich <[EMAIL PROTECTED]>
AuthorDate: Tue Aug 28 13:20:48 2007 +0200
Committer:  Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Sep 10 16:01:22 2007 -0500

    [PPC] 8xx: Fix r3 trashing due to 8MB TLB page instantiation
    Instantiation of 8MB pages on the TLB cache for the kernel static
    mapping trashes r3 register on !CONFIG_8xx_CPU6 configurations.
    This ensures r3 gets saved and restored.
    This has been posted to linuxppc-embedded by Marcelo Tosatti
    <[EMAIL PROTECTED]>, but only an incomplete version of the patch
    has been applied in c51e078f82096a7d35ac8ec2416272e843a0e1c4.
    This patch adds the rest of the fix.
    Signed-off-by: Jochen Friedrich <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
 arch/ppc/kernel/head_8xx.S |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index 944c35c..eb8d26f 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -495,9 +495,7 @@ LoadLargeDTLB:
        lwz     r11, 4(r0)
        lwz     r12, 16(r0)
-#ifdef CONFIG_8xx_CPU6
        lwz     r3, 8(r0)
 /* This is the data TLB error on the MPC8xx.  This could be due to
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