Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=8112753bb2c0045398c89d0647792b39805f6d40
Commit:     8112753bb2c0045398c89d0647792b39805f6d40
Parent:     84e3ad5b91ed51db7513a54ad7ed652ab0ca4ba1
Author:     Valentine Barshak <[EMAIL PROTECTED]>
AuthorDate: Sat Sep 22 00:46:57 2007 +1000
Committer:  Josh Boyer <[EMAIL PROTECTED]>
CommitDate: Wed Oct 3 07:20:17 2007 -0500

    [POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx
    
    The PowerPC 440EP(x) FPU init is currently done in head_44x
    under ifdefs. Since we should support more then one board
    in the same kernel, we move FPU initialization code from head_44x
    to cpu_setup_44x and add cpu_setup callbacks for 440EP(x).
    
    Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
    Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
 arch/powerpc/kernel/cpu_setup_44x.S |   14 ++++++++++++++
 arch/powerpc/kernel/cputable.c      |    6 ++++++
 arch/powerpc/kernel/head_44x.S      |   10 ----------
 3 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kernel/cpu_setup_44x.S 
b/arch/powerpc/kernel/cpu_setup_44x.S
index 6a6e6c7..c790634 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -17,3 +17,17 @@
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
 
+_GLOBAL(__setup_cpu_440ep)
+       b       __init_fpu_44x
+_GLOBAL(__setup_cpu_440epx)
+       b       __init_fpu_44x
+
+/* enable APU between CPU and FPU */
+_GLOBAL(__init_fpu_44x)
+       mfspr   r3,SPRN_CCR0
+       /* Clear DAPUIB flag in CCR0 */
+       rlwinm  r3,r3,0,12,10
+       mtspr   SPRN_CCR0,r3
+       isync
+       blr
+
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 8711499..94d9819 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -31,6 +31,8 @@ EXPORT_SYMBOL(cur_cpu_spec);
  * and ppc64
  */
 #ifdef CONFIG_PPC32
+extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -1111,6 +1113,7 @@ static struct cpu_spec cpu_specs[] = {
                .cpu_user_features      = COMMON_USER_BOOKE | 
PPC_FEATURE_HAS_FPU,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
+               .cpu_setup              = __setup_cpu_440ep,
                .platform               = "ppc440",
        },
        {
@@ -1121,6 +1124,7 @@ static struct cpu_spec cpu_specs[] = {
                .cpu_user_features      = COMMON_USER_BOOKE | 
PPC_FEATURE_HAS_FPU,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
+               .cpu_setup              = __setup_cpu_440ep,
                .platform               = "ppc440",
        },
        { /* 440EPX */
@@ -1131,6 +1135,8 @@ static struct cpu_spec cpu_specs[] = {
                .cpu_user_features      = COMMON_USER_BOOKE | 
PPC_FEATURE_HAS_FPU,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
+               .cpu_setup              = __setup_cpu_440epx,
+               .platform               = "ppc440",
        },
        { /* 440GRX */
                .pvr_mask               = 0xf0000ffb,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index c6a510b..864d63f 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -217,16 +217,6 @@ skpinv:    addi    r4,r4,1                         /* 
Increment */
        lis     r4,[EMAIL PROTECTED]    /* IVPR only uses the high 16-bits */
        mtspr   SPRN_IVPR,r4
 
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
-       /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
-       mfspr   r2,SPRN_CCR0
-       lis     r3,0xffef
-       ori     r3,r3,0xffff
-       and     r2,r2,r3
-       mtspr   SPRN_CCR0,r2
-       isync
-#endif
-
        /*
         * This is where the main kernel code starts.
         */
-
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