Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=b6927bca245f83879bcb319aa108a1a347e36d8f
Commit:     b6927bca245f83879bcb319aa108a1a347e36d8f
Parent:     0438c28fa40c1145e8322f91feb9e6fed3301d94
Author:     Emil Medve <[EMAIL PROTECTED]>
AuthorDate: Wed Sep 26 12:03:40 2007 -0500
Committer:  Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Thu Oct 4 11:03:03 2007 -0500

    [POWERPC] QE: Added missing CEURNR register
    
    According to the publicly available MPC8360E RM (rev. 1 from 09/2006 and 
rev. 2
    from 05/2007) and MPC8323E RM (rev. 1 from 09/2006), CEURNR is the QE 
microcode
    revision number register and is located at offset 0x1b8 within the QE 
internal
    register space
    
    Signed-off-by: Emil Medve <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 include/asm-powerpc/immap_qe.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index 1020b7f..02548f7 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -86,8 +86,9 @@ struct cp_qe {
        __be16  ceexe4;         /* QE external request 4 event register */
        u8      res11[0x2];
        __be16  ceexm4;         /* QE external request 4 mask register */
-       u8      res12[0x2];
-       u8      res13[0x280];
+       u8      res12[0x3A];
+       __be32  ceurnr;         /* QE microcode revision number register */
+       u8      res13[0x244];
 } __attribute__ ((packed));
 
 /* QE Multiplexer */
-
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