Commit:     cdec12aebe1b10aa58bebaa05bb697843154f7f9
Parent:     d968014b7280e2c447b20363e576999040ac72ef
Author:     Paul Mackerras <[EMAIL PROTECTED]>
AuthorDate: Thu Oct 11 21:46:45 2007 +1000
Committer:  Paul Mackerras <[EMAIL PROTECTED]>
CommitDate: Thu Oct 11 21:49:23 2007 +1000

    [POWERPC] Make clockevents work on PPC601 processors
    In testing the new clocksource and clockevent code on a PPC601
    processor, I discovered that the clockevent multiplier value for the
    decrementer clockevent was overflowing.  Because the RTCL register in
    the 601 effectively counts at 1GHz (it doesn't actually, but it
    increases by 128 every 128ns), and the shift value was 32, that meant
    the multiplier value had to be 2^32, which won't fit in an unsigned
    long on 32-bit.  The same problem would arise on any platform where
    the timebase frequency was 1GHz or more (not that we actually have any
    such machines today).
    This fixes it by reducing the shift value to 16.  Doing the
    calculations with a resolution of 2^-16 nanoseconds (15 femtoseconds)
    should be quite adequate.  :)
    Signed-off-by: Paul Mackerras <[EMAIL PROTECTED]>
 arch/powerpc/kernel/time.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 64b503c..9368da3 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -108,7 +108,7 @@ static void decrementer_set_mode(enum clock_event_mode mode,
 static struct clock_event_device decrementer_clockevent = {
        .name           = "decrementer",
        .rating         = 200,
-       .shift          = 32,
+       .shift          = 16,
        .mult           = 0,    /* To be filled in */
        .irq            = 0,
        .set_next_event = decrementer_set_next_event,
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