Commit:     df1bdc0667eb3132fe60b3562347ca9133694ee0
Parent:     2b9e0aae1d50e880c58d46788e5e3ebd89d75d62
Author:     Nick Piggin <[EMAIL PROTECTED]>
AuthorDate: Sat Oct 13 03:06:00 2007 +0200
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Fri Oct 12 18:41:21 2007 -0700

    x86: fence oostores on 64-bit
    movnt* instructions are not strongly ordered with respect to other stores,
    so if we are to assume stores are strongly ordered in the rest of the 64
    bit code, we must fence these off (see similar examples in 32 bit code).
    [ The AMD memory ordering document seems to say that nontemporal stores can
      also pass earlier regular stores, so maybe we need sfences _before_
      movnt* everywhere too? ]
    Signed-off-by: Nick Piggin <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
 arch/x86/lib/copy_user_nocache_64.S |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/lib/copy_user_nocache_64.S 
index 4620efb..5196762 100644
--- a/arch/x86/lib/copy_user_nocache_64.S
+++ b/arch/x86/lib/copy_user_nocache_64.S
@@ -117,6 +117,7 @@ ENTRY(__copy_user_nocache)
        popq %rbx
        CFI_RESTORE rbx
+       sfence
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