Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=7075bc816cfad142da92207ed5a6f3da55b143ef
Commit: 7075bc816cfad142da92207ed5a6f3da55b143ef
Parent: 8fc0d085f521a2a76418f8f569cf1cd27f0e43d4
Author: Rusty Russell <[EMAIL PROTECTED]>
AuthorDate: Tue Jul 17 23:37:17 2007 +1000
Committer: Avi Kivity <[EMAIL PROTECTED]>
CommitDate: Sat Oct 13 10:18:19 2007 +0200
KVM: Use standard CR8 flags, and fix TPR definition
Intel manual (and KVM definition) say the TPR is 4 bits wide. Also fix
CR8_RESEVED_BITS typo.
Signed-off-by: Rusty Russell <[EMAIL PROTECTED]>
Acked-by: H. Peter Anvin <[EMAIL PROTECTED]>
Signed-off-by: Avi Kivity <[EMAIL PROTECTED]>
---
drivers/kvm/kvm_main.c | 4 ++--
include/asm-x86/processor-flags.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/kvm/kvm_main.c b/drivers/kvm/kvm_main.c
index 193197f..f0fc8d9 100644
--- a/drivers/kvm/kvm_main.c
+++ b/drivers/kvm/kvm_main.c
@@ -92,7 +92,7 @@ static struct dentry *debugfs_dir;
| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
-#define CR8_RESEVED_BITS (~0x0fULL)
+#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
#define EFER_RESERVED_BITS 0xfffffffffffff2fe
#ifdef CONFIG_X86_64
@@ -625,7 +625,7 @@ EXPORT_SYMBOL_GPL(set_cr3);
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
{
- if ( cr8 & CR8_RESEVED_BITS) {
+ if (cr8 & CR8_RESERVED_BITS) {
printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
inject_gp(vcpu);
return;
diff --git a/include/asm-x86/processor-flags.h
b/include/asm-x86/processor-flags.h
index 5404e90..199cab1 100644
--- a/include/asm-x86/processor-flags.h
+++ b/include/asm-x86/processor-flags.h
@@ -63,7 +63,7 @@
/*
* x86-64 Task Priority Register, CR8
*/
-#define X86_CR8_TPR 0x00000007 /* task priority register */
+#define X86_CR8_TPR 0x0000000F /* task priority register */
/*
* AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
-
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