Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=a202707e71ff16d5e3a92f40eeaa41f3099dd8c5
Commit:     a202707e71ff16d5e3a92f40eeaa41f3099dd8c5
Parent:     6662cbb989ee71712176570759bdc4e596aed417
Author:     Chris David <[EMAIL PROTECTED]>
AuthorDate: Sat Oct 13 23:56:33 2007 +0200
Committer:  Jean Delvare <[EMAIL PROTECTED]>
CommitDate: Sat Oct 13 23:56:33 2007 +0200

    i2c-au1550: Fix a misused register problem
    
    Fix a "mis-used register" problem on the AMD MIPS Alchemy au1550
    I2C interface.
    
    In summary, the programmable serial controller seems to hang the kernel
    when I send a single 'address' byte on the I2C bus.  The patch
    essentially uses the PSC_SMBSTAT register's TE (transmit FIFO empty)
    bit to check when the transmit FIFO is empty, instead of using the
    PSC_SMBEVNT register's TU (transmit underflow) bit.  Using the TE bit
    fixed the hang problem.
    
    Signed-off-by: Chris David <[EMAIL PROTECTED]>
    Acked-by: Ralf Baechle <[EMAIL PROTECTED]>
    Signed-off-by: Jean Delvare <[EMAIL PROTECTED]>
---
 drivers/i2c/busses/i2c-au1550.c |   11 ++++-------
 1 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index d7e7c35..2f68416 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -48,17 +48,14 @@ wait_xfer_done(struct i2c_au1550_data *adap)
 
        sp = (volatile psc_smb_t *)(adap->psc_base);
 
-       /* Wait for Tx FIFO Underflow.
+       /* Wait for Tx Buffer Empty
        */
        for (i = 0; i < adap->xfer_timeout; i++) {
-               stat = sp->psc_smbevnt;
+               stat = sp->psc_smbstat;
                au_sync();
-               if ((stat & PSC_SMBEVNT_TU) != 0) {
-                       /* Clear it.  */
-                       sp->psc_smbevnt = PSC_SMBEVNT_TU;
-                       au_sync();
+               if ((stat & PSC_SMBSTAT_TE) != 0)
                        return 0;
-               }
+
                udelay(1);
        }
 
-
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