Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=f545714ece023b8cf10b41d56b9fdac605797aff
Commit:     f545714ece023b8cf10b41d56b9fdac605797aff
Parent:     cf68d212d522db70887d63befc9941fa1d78acc4
Author:     Krzysztof Helt <[EMAIL PROTECTED]>
AuthorDate: Tue Sep 4 13:24:14 2007 +0200
Committer:  Jaroslav Kysela <[EMAIL PROTECTED]>
CommitDate: Tue Oct 16 15:59:56 2007 +0200

    [ALSA] cs4231 header split
    
    This patch splits the cs4231.h file into two parts:
    - cs4231-regs.h which contain register constants and macros
    - cs4231.h which includes the above and contain rest of the definitions
    This will allow to share register definitions between x86 ISA cs4231
    and SPARC cs4231.
    
    Signed-off-by: Krzysztof Helt <[EMAIL PROTECTED]>
    Signed-off-by: Takashi Iwai <[EMAIL PROTECTED]>
    Signed-off-by: Jaroslav Kysela <[EMAIL PROTECTED]>
---
 include/sound/cs4231-regs.h |  180 +++++++++++++++++++++++++++++++++++++++++++
 include/sound/cs4231.h      |  155 +------------------------------------
 2 files changed, 181 insertions(+), 154 deletions(-)

diff --git a/include/sound/cs4231-regs.h b/include/sound/cs4231-regs.h
new file mode 100644
index 0000000..80872e8
--- /dev/null
+++ b/include/sound/cs4231-regs.h
@@ -0,0 +1,180 @@
+#ifndef __SOUND_CS4231_REGS_H
+#define __SOUND_CS4231_REGS_H
+
+/*
+ *  Copyright (c) by Jaroslav Kysela <[EMAIL PROTECTED]>
+ *  Definitions for CS4231 & InterWave chips & compatible chips registers
+ *
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+
+/* IO ports */
+
+#define CS4231P(x)             (c_d_c_CS4231##x)
+
+#define c_d_c_CS4231REGSEL     0
+#define c_d_c_CS4231REG                1
+#define c_d_c_CS4231STATUS     2
+#define c_d_c_CS4231PIO                3
+
+/* codec registers */
+
+#define CS4231_LEFT_INPUT      0x00    /* left input control */
+#define CS4231_RIGHT_INPUT     0x01    /* right input control */
+#define CS4231_AUX1_LEFT_INPUT 0x02    /* left AUX1 input control */
+#define CS4231_AUX1_RIGHT_INPUT        0x03    /* right AUX1 input control */
+#define CS4231_AUX2_LEFT_INPUT 0x04    /* left AUX2 input control */
+#define CS4231_AUX2_RIGHT_INPUT        0x05    /* right AUX2 input control */
+#define CS4231_LEFT_OUTPUT     0x06    /* left output control register */
+#define CS4231_RIGHT_OUTPUT    0x07    /* right output control register */
+#define CS4231_PLAYBK_FORMAT   0x08    /* clock and data format - playback - 
bits 7-0 MCE */
+#define CS4231_IFACE_CTRL      0x09    /* interface control - bits 7-2 MCE */
+#define CS4231_PIN_CTRL                0x0a    /* pin control */
+#define CS4231_TEST_INIT       0x0b    /* test and initialization */
+#define CS4231_MISC_INFO       0x0c    /* miscellaneaous information */
+#define CS4231_LOOPBACK                0x0d    /* loopback control */
+#define CS4231_PLY_UPR_CNT     0x0e    /* playback upper base count */
+#define CS4231_PLY_LWR_CNT     0x0f    /* playback lower base count */
+#define CS4231_ALT_FEATURE_1   0x10    /* alternate #1 feature enable */
+#define AD1845_AF1_MIC_LEFT    0x10    /* alternate #1 feature + MIC left */
+#define CS4231_ALT_FEATURE_2   0x11    /* alternate #2 feature enable */
+#define AD1845_AF2_MIC_RIGHT   0x11    /* alternate #2 feature + MIC right */
+#define CS4231_LEFT_LINE_IN    0x12    /* left line input control */
+#define CS4231_RIGHT_LINE_IN   0x13    /* right line input control */
+#define CS4231_TIMER_LOW       0x14    /* timer low byte */
+#define CS4231_TIMER_HIGH      0x15    /* timer high byte */
+#define CS4231_LEFT_MIC_INPUT  0x16    /* left MIC input control register 
(InterWave only) */
+#define AD1845_UPR_FREQ_SEL    0x16    /* upper byte of frequency select */
+#define CS4231_RIGHT_MIC_INPUT 0x17    /* right MIC input control register 
(InterWave only) */
+#define AD1845_LWR_FREQ_SEL    0x17    /* lower byte of frequency select */
+#define CS4236_EXT_REG         0x17    /* extended register access */
+#define CS4231_IRQ_STATUS      0x18    /* irq status register */
+#define CS4231_LINE_LEFT_OUTPUT        0x19    /* left line output control 
register (InterWave only) */
+#define CS4231_VERSION         0x19    /* CS4231(A) - version values */
+#define CS4231_MONO_CTRL       0x1a    /* mono input/output control */
+#define CS4231_LINE_RIGHT_OUTPUT 0x1b  /* right line output control register 
(InterWave only) */
+#define AD1845_PWR_DOWN                0x1b    /* power down control */
+#define CS4235_LEFT_MASTER     0x1b    /* left master output control */
+#define CS4231_REC_FORMAT      0x1c    /* clock and data format - record - 
bits 7-0 MCE */
+#define CS4231_PLY_VAR_FREQ    0x1d    /* playback variable frequency */
+#define AD1845_CLOCK           0x1d    /* crystal clock select and total power 
down */
+#define CS4235_RIGHT_MASTER    0x1d    /* right master output control */
+#define CS4231_REC_UPR_CNT     0x1e    /* record upper count */
+#define CS4231_REC_LWR_CNT     0x1f    /* record lower count */
+
+/* definitions for codec register select port - CODECP( REGSEL ) */
+
+#define CS4231_INIT            0x80    /* CODEC is initializing */
+#define CS4231_MCE             0x40    /* mode change enable */
+#define CS4231_TRD             0x20    /* transfer request disable */
+
+/* definitions for codec status register - CODECP( STATUS ) */
+
+#define CS4231_GLOBALIRQ       0x01    /* IRQ is active */
+
+/* definitions for codec irq status */
+
+#define CS4231_PLAYBACK_IRQ    0x10
+#define CS4231_RECORD_IRQ      0x20
+#define CS4231_TIMER_IRQ       0x40
+#define CS4231_ALL_IRQS                0x70
+#define CS4231_REC_UNDERRUN    0x08
+#define CS4231_REC_OVERRUN     0x04
+#define CS4231_PLY_OVERRUN     0x02
+#define CS4231_PLY_UNDERRUN    0x01
+
+/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
+
+#define CS4231_ENABLE_MIC_GAIN 0x20
+
+#define CS4231_MIXS_LINE       0x00
+#define CS4231_MIXS_AUX1       0x40
+#define CS4231_MIXS_MIC                0x80
+#define CS4231_MIXS_ALL                0xc0
+
+/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
+
+#define CS4231_LINEAR_8                0x00    /* 8-bit unsigned data */
+#define CS4231_ALAW_8          0x60    /* 8-bit A-law companded */
+#define CS4231_ULAW_8          0x20    /* 8-bit U-law companded */
+#define CS4231_LINEAR_16       0x40    /* 16-bit twos complement data - little 
endian */
+#define CS4231_LINEAR_16_BIG   0xc0    /* 16-bit twos complement data - big 
endian */
+#define CS4231_ADPCM_16                0xa0    /* 16-bit ADPCM */
+#define CS4231_STEREO          0x10    /* stereo mode */
+/* bits 3-1 define frequency divisor */
+#define CS4231_XTAL1           0x00    /* 24.576 crystal */
+#define CS4231_XTAL2           0x01    /* 16.9344 crystal */
+
+/* definitions for interface control register - CS4231_IFACE_CTRL */
+
+#define CS4231_RECORD_PIO      0x80    /* record PIO enable */
+#define CS4231_PLAYBACK_PIO    0x40    /* playback PIO enable */
+#define CS4231_CALIB_MODE      0x18    /* calibration mode bits */
+#define CS4231_AUTOCALIB       0x08    /* auto calibrate */
+#define CS4231_SINGLE_DMA      0x04    /* use single DMA channel */
+#define CS4231_RECORD_ENABLE   0x02    /* record enable */
+#define CS4231_PLAYBACK_ENABLE 0x01    /* playback enable */
+
+/* definitions for pin control register - CS4231_PIN_CTRL */
+
+#define CS4231_IRQ_ENABLE      0x02    /* enable IRQ */
+#define CS4231_XCTL1           0x40    /* external control #1 */
+#define CS4231_XCTL0           0x80    /* external control #0 */
+
+/* definitions for test and init register - CS4231_TEST_INIT */
+
+#define CS4231_CALIB_IN_PROGRESS 0x20  /* auto calibrate in progress */
+#define CS4231_DMA_REQUEST     0x10    /* DMA request in progress */
+
+/* definitions for misc control register - CS4231_MISC_INFO */
+
+#define CS4231_MODE2           0x40    /* MODE 2 */
+#define CS4231_IW_MODE3                0x6c    /* MODE 3 - InterWave enhanced 
mode */
+#define CS4231_4236_MODE3      0xe0    /* MODE 3 - CS4236+ enhanced mode */
+
+/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
+
+#define        CS4231_DACZ             0x01    /* zero DAC when underrun */
+#define CS4231_TIMER_ENABLE    0x40    /* codec timer enable */
+#define CS4231_OLB             0x80    /* output level bit */
+
+/* definitions for Extended Registers - CS4236+ */
+
+#define CS4236_REG(i23val)     (((i23val << 2) & 0x10) | ((i23val >> 4) & 
0x0f))
+#define CS4236_I23VAL(reg)     ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8)
+
+#define CS4236_LEFT_LINE       0x08    /* left LINE alternate volume */
+#define CS4236_RIGHT_LINE      0x18    /* right LINE alternate volume */
+#define CS4236_LEFT_MIC                0x28    /* left MIC volume */
+#define CS4236_RIGHT_MIC       0x38    /* right MIC volume */
+#define CS4236_LEFT_MIX_CTRL   0x48    /* synthesis and left input mixer 
control */
+#define CS4236_RIGHT_MIX_CTRL  0x58    /* right input mixer control */
+#define CS4236_LEFT_FM         0x68    /* left FM volume */
+#define CS4236_RIGHT_FM                0x78    /* right FM volume */
+#define CS4236_LEFT_DSP                0x88    /* left DSP serial port volume 
*/
+#define CS4236_RIGHT_DSP       0x98    /* right DSP serial port volume */
+#define CS4236_RIGHT_LOOPBACK  0xa8    /* right loopback monitor volume */
+#define CS4236_DAC_MUTE                0xb8    /* DAC mute and IFSE enable */
+#define CS4236_ADC_RATE                0xc8    /* indenpendent ADC sample 
frequency */
+#define CS4236_DAC_RATE                0xd8    /* indenpendent DAC sample 
frequency */
+#define CS4236_LEFT_MASTER     0xe8    /* left master digital audio volume */
+#define CS4236_RIGHT_MASTER    0xf8    /* right master digital audio volume */
+#define CS4236_LEFT_WAVE       0x0c    /* left wavetable serial port volume */
+#define CS4236_RIGHT_WAVE      0x1c    /* right wavetable serial port volume */
+#define CS4236_VERSION         0x9c    /* chip version and ID */
+
+#endif /* __SOUND_CS4231_REGS_H */
diff --git a/include/sound/cs4231.h b/include/sound/cs4231.h
index b195a73..4d0e3bc 100644
--- a/include/sound/cs4231.h
+++ b/include/sound/cs4231.h
@@ -26,160 +26,7 @@
 #include "pcm.h"
 #include "timer.h"
 
-/* IO ports */
-
-#define CS4231P(x)             (c_d_c_CS4231##x)
-
-#define c_d_c_CS4231REGSEL     0
-#define c_d_c_CS4231REG                1
-#define c_d_c_CS4231STATUS     2
-#define c_d_c_CS4231PIO                3
-
-/* codec registers */
-
-#define CS4231_LEFT_INPUT      0x00    /* left input control */
-#define CS4231_RIGHT_INPUT     0x01    /* right input control */
-#define CS4231_AUX1_LEFT_INPUT 0x02    /* left AUX1 input control */
-#define CS4231_AUX1_RIGHT_INPUT        0x03    /* right AUX1 input control */
-#define CS4231_AUX2_LEFT_INPUT 0x04    /* left AUX2 input control */
-#define CS4231_AUX2_RIGHT_INPUT        0x05    /* right AUX2 input control */
-#define CS4231_LEFT_OUTPUT     0x06    /* left output control register */
-#define CS4231_RIGHT_OUTPUT    0x07    /* right output control register */
-#define CS4231_PLAYBK_FORMAT   0x08    /* clock and data format - playback - 
bits 7-0 MCE */
-#define CS4231_IFACE_CTRL      0x09    /* interface control - bits 7-2 MCE */
-#define CS4231_PIN_CTRL                0x0a    /* pin control */
-#define CS4231_TEST_INIT       0x0b    /* test and initialization */
-#define CS4231_MISC_INFO       0x0c    /* miscellaneaous information */
-#define CS4231_LOOPBACK                0x0d    /* loopback control */
-#define CS4231_PLY_UPR_CNT     0x0e    /* playback upper base count */
-#define CS4231_PLY_LWR_CNT     0x0f    /* playback lower base count */
-#define CS4231_ALT_FEATURE_1   0x10    /* alternate #1 feature enable */
-#define AD1845_AF1_MIC_LEFT    0x10    /* alternate #1 feature + MIC left */
-#define CS4231_ALT_FEATURE_2   0x11    /* alternate #2 feature enable */
-#define AD1845_AF2_MIC_RIGHT   0x11    /* alternate #2 feature + MIC right */
-#define CS4231_LEFT_LINE_IN    0x12    /* left line input control */
-#define CS4231_RIGHT_LINE_IN   0x13    /* right line input control */
-#define CS4231_TIMER_LOW       0x14    /* timer low byte */
-#define CS4231_TIMER_HIGH      0x15    /* timer high byte */
-#define CS4231_LEFT_MIC_INPUT  0x16    /* left MIC input control register 
(InterWave only) */
-#define AD1845_UPR_FREQ_SEL    0x16    /* upper byte of frequency select */
-#define CS4231_RIGHT_MIC_INPUT 0x17    /* right MIC input control register 
(InterWave only) */
-#define AD1845_LWR_FREQ_SEL    0x17    /* lower byte of frequency select */
-#define CS4236_EXT_REG         0x17    /* extended register access */
-#define CS4231_IRQ_STATUS      0x18    /* irq status register */
-#define CS4231_LINE_LEFT_OUTPUT        0x19    /* left line output control 
register (InterWave only) */
-#define CS4231_VERSION         0x19    /* CS4231(A) - version values */
-#define CS4231_MONO_CTRL       0x1a    /* mono input/output control */
-#define CS4231_LINE_RIGHT_OUTPUT 0x1b  /* right line output control register 
(InterWave only) */
-#define AD1845_PWR_DOWN                0x1b    /* power down control */
-#define CS4235_LEFT_MASTER     0x1b    /* left master output control */
-#define CS4231_REC_FORMAT      0x1c    /* clock and data format - record - 
bits 7-0 MCE */
-#define CS4231_PLY_VAR_FREQ    0x1d    /* playback variable frequency */
-#define AD1845_CLOCK           0x1d    /* crystal clock select and total power 
down */
-#define CS4235_RIGHT_MASTER    0x1d    /* right master output control */
-#define CS4231_REC_UPR_CNT     0x1e    /* record upper count */
-#define CS4231_REC_LWR_CNT     0x1f    /* record lower count */
-
-/* definitions for codec register select port - CODECP( REGSEL ) */
-
-#define CS4231_INIT            0x80    /* CODEC is initializing */
-#define CS4231_MCE             0x40    /* mode change enable */
-#define CS4231_TRD             0x20    /* transfer request disable */
-
-/* definitions for codec status register - CODECP( STATUS ) */
-
-#define CS4231_GLOBALIRQ       0x01    /* IRQ is active */
-
-/* definitions for codec irq status */
-
-#define CS4231_PLAYBACK_IRQ    0x10
-#define CS4231_RECORD_IRQ      0x20
-#define CS4231_TIMER_IRQ       0x40
-#define CS4231_ALL_IRQS                0x70
-#define CS4231_REC_UNDERRUN    0x08
-#define CS4231_REC_OVERRUN     0x04
-#define CS4231_PLY_OVERRUN     0x02
-#define CS4231_PLY_UNDERRUN    0x01
-
-/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
-
-#define CS4231_ENABLE_MIC_GAIN 0x20
-
-#define CS4231_MIXS_LINE       0x00
-#define CS4231_MIXS_AUX1       0x40
-#define CS4231_MIXS_MIC                0x80
-#define CS4231_MIXS_ALL                0xc0
-
-/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
-
-#define CS4231_LINEAR_8                0x00    /* 8-bit unsigned data */
-#define CS4231_ALAW_8          0x60    /* 8-bit A-law companded */
-#define CS4231_ULAW_8          0x20    /* 8-bit U-law companded */
-#define CS4231_LINEAR_16       0x40    /* 16-bit twos complement data - little 
endian */
-#define CS4231_LINEAR_16_BIG   0xc0    /* 16-bit twos complement data - big 
endian */
-#define CS4231_ADPCM_16                0xa0    /* 16-bit ADPCM */
-#define CS4231_STEREO          0x10    /* stereo mode */
-/* bits 3-1 define frequency divisor */
-#define CS4231_XTAL1           0x00    /* 24.576 crystal */
-#define CS4231_XTAL2           0x01    /* 16.9344 crystal */
-
-/* definitions for interface control register - CS4231_IFACE_CTRL */
-
-#define CS4231_RECORD_PIO      0x80    /* record PIO enable */
-#define CS4231_PLAYBACK_PIO    0x40    /* playback PIO enable */
-#define CS4231_CALIB_MODE      0x18    /* calibration mode bits */
-#define CS4231_AUTOCALIB       0x08    /* auto calibrate */
-#define CS4231_SINGLE_DMA      0x04    /* use single DMA channel */
-#define CS4231_RECORD_ENABLE   0x02    /* record enable */
-#define CS4231_PLAYBACK_ENABLE 0x01    /* playback enable */
-
-/* definitions for pin control register - CS4231_PIN_CTRL */
-
-#define CS4231_IRQ_ENABLE      0x02    /* enable IRQ */
-#define CS4231_XCTL1           0x40    /* external control #1 */
-#define CS4231_XCTL0           0x80    /* external control #0 */
-
-/* definitions for test and init register - CS4231_TEST_INIT */
-
-#define CS4231_CALIB_IN_PROGRESS 0x20  /* auto calibrate in progress */
-#define CS4231_DMA_REQUEST     0x10    /* DMA request in progress */
-
-/* definitions for misc control register - CS4231_MISC_INFO */
-
-#define CS4231_MODE2           0x40    /* MODE 2 */
-#define CS4231_IW_MODE3                0x6c    /* MODE 3 - InterWave enhanced 
mode */
-#define CS4231_4236_MODE3      0xe0    /* MODE 3 - CS4236+ enhanced mode */
-
-/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
-
-#define        CS4231_DACZ             0x01    /* zero DAC when underrun */
-#define CS4231_TIMER_ENABLE    0x40    /* codec timer enable */
-#define CS4231_OLB             0x80    /* output level bit */
-
-/* definitions for Extended Registers - CS4236+ */
-
-#define CS4236_REG(i23val)     (((i23val << 2) & 0x10) | ((i23val >> 4) & 
0x0f))
-#define CS4236_I23VAL(reg)     ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8)
-
-#define CS4236_LEFT_LINE       0x08    /* left LINE alternate volume */
-#define CS4236_RIGHT_LINE      0x18    /* right LINE alternate volume */
-#define CS4236_LEFT_MIC                0x28    /* left MIC volume */
-#define CS4236_RIGHT_MIC       0x38    /* right MIC volume */
-#define CS4236_LEFT_MIX_CTRL   0x48    /* synthesis and left input mixer 
control */
-#define CS4236_RIGHT_MIX_CTRL  0x58    /* right input mixer control */
-#define CS4236_LEFT_FM         0x68    /* left FM volume */
-#define CS4236_RIGHT_FM                0x78    /* right FM volume */
-#define CS4236_LEFT_DSP                0x88    /* left DSP serial port volume 
*/
-#define CS4236_RIGHT_DSP       0x98    /* right DSP serial port volume */
-#define CS4236_RIGHT_LOOPBACK  0xa8    /* right loopback monitor volume */
-#define CS4236_DAC_MUTE                0xb8    /* DAC mute and IFSE enable */
-#define CS4236_ADC_RATE                0xc8    /* indenpendent ADC sample 
frequency */
-#define CS4236_DAC_RATE                0xd8    /* indenpendent DAC sample 
frequency */
-#define CS4236_LEFT_MASTER     0xe8    /* left master digital audio volume */
-#define CS4236_RIGHT_MASTER    0xf8    /* right master digital audio volume */
-#define CS4236_LEFT_WAVE       0x0c    /* left wavetable serial port volume */
-#define CS4236_RIGHT_WAVE      0x1c    /* right wavetable serial port volume */
-#define CS4236_VERSION         0x9c    /* chip version and ID */
+#include "cs4231-regs.h"
 
 /* defines for codec.mode */
 
-
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