Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=8ffbc01e2cb2e203df910468f236c7b4e7b36f25
Commit: 8ffbc01e2cb2e203df910468f236c7b4e7b36f25
Parent: 35add1c295c634fdbb1072189286e4eab3fd64fa
Author: Clemens Ladisch <[EMAIL PROTECTED]>
AuthorDate: Mon Sep 17 09:39:51 2007 +0200
Committer: Jaroslav Kysela <[EMAIL PROTECTED]>
CommitDate: Tue Oct 16 16:50:33 2007 +0200
[ALSA] cmipci: reorganize set_dac_channels()
By reorganizing the code that sets the CHB3DxC bits we can not only
simplify this code but also fix the bug where the CHB3D8C bit was not
reset when playing a stereo stream after a 7.1 stream.
Signed-off-by: Clemens Ladisch <[EMAIL PROTECTED]>
Signed-off-by: Jaroslav Kysela <[EMAIL PROTECTED]>
---
sound/pci/cmipci.c | 49 +++++++++++++++++++------------------------------
1 files changed, 19 insertions(+), 30 deletions(-)
diff --git a/sound/pci/cmipci.c b/sound/pci/cmipci.c
index c51ea0e..b4f74ae 100644
--- a/sound/pci/cmipci.c
+++ b/sound/pci/cmipci.c
@@ -738,48 +738,37 @@ static struct snd_pcm_hw_constraint_list
hw_constraints_channels_8 = {
static int set_dac_channels(struct cmipci *cm, struct cmipci_pcm *rec, int
channels)
{
if (channels > 2) {
- if (! cm->can_multi_ch)
+ if (!cm->can_multi_ch || !rec->ch)
return -EINVAL;
if (rec->fmt != 0x03) /* stereo 16bit only */
return -EINVAL;
+ }
+ if (cm->can_multi_ch) {
spin_lock_irq(&cm->reg_lock);
- snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
- snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
- if (channels > 4) {
- snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
- snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
+ if (channels > 2) {
+ snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
+ snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
} else {
- snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
- snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
+ snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
+ snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
}
- if (channels >= 6) {
+ if (channels == 8)
+ snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
+ else
+ snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
+ if (channels == 6) {
+ snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
- snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
} else {
- snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL,
CM_CHB3D6C);
- snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
- }
- if (cm->chip_version == 68) {
- if (channels == 8) {
- snd_cmipci_set_bit(cm, CM_REG_EXT_MISC,
CM_CHB3D8C);
- } else {
- snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC,
CM_CHB3D8C);
- }
- }
- spin_unlock_irq(&cm->reg_lock);
-
- } else {
- if (cm->can_multi_ch) {
- spin_lock_irq(&cm->reg_lock);
- snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
- snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL,
CM_CHB3D6C);
- snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
- snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
- spin_unlock_irq(&cm->reg_lock);
}
+ if (channels == 4)
+ snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
+ else
+ snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
+ spin_unlock_irq(&cm->reg_lock);
}
return 0;
}
-
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