Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=5b20311eeae7c5e7d9484cd0878ac756a20a78e4
Commit:     5b20311eeae7c5e7d9484cd0878ac756a20a78e4
Parent:     b60745b960dc8313400899fcda310ba51604ffb8
Author:     Simon Arlott <[EMAIL PROTECTED]>
AuthorDate: Sat Oct 20 01:24:05 2007 +0200
Committer:  Adrian Bunk <[EMAIL PROTECTED]>
CommitDate: Sat Oct 20 01:24:05 2007 +0200

    spelling fixes: arch/v850/
    
    Spelling fixes in arch/v850/.
    
    Signed-off-by: Simon Arlott <[EMAIL PROTECTED]>
    Signed-off-by: Adrian Bunk <[EMAIL PROTECTED]>
---
 arch/v850/kernel/me2.c          |    4 ++--
 arch/v850/kernel/rte_mb_a_pci.c |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/v850/kernel/me2.c b/arch/v850/kernel/me2.c
index 38be5c1..007115d 100644
--- a/arch/v850/kernel/me2.c
+++ b/arch/v850/kernel/me2.c
@@ -58,13 +58,13 @@ void __init me2_init_irqs (void)
 void me2_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
 {
        if (chan == 0) {
-               /* Specify that the relevent pins on the chip should do
+               /* Specify that the relevant pins on the chip should do
                   serial I/O, not direct I/O.  */
                ME2_PORT1_PMC |= 0xC;
                /* Specify that we're using the UART, not the CSI device. */
                ME2_PORT1_PFC |= 0xC;
        } else if (chan == 1) {
-               /* Specify that the relevent pins on the chip should do
+               /* Specify that the relevant pins on the chip should do
                   serial I/O, not direct I/O.  */
                ME2_PORT2_PMC |= 0x6;
                /* Specify that we're using the UART, not the CSI device. */
diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c
index 35a4bd5..7165478 100644
--- a/arch/v850/kernel/rte_mb_a_pci.c
+++ b/arch/v850/kernel/rte_mb_a_pci.c
@@ -179,7 +179,7 @@ static int __devinit pcibios_init (void)
                   default uses.  */
 
                /* Significant address bits used for decoding PCI GCS5 space
-                  accessess.  */
+                  accesses.  */
                MB_A_PCI_DMRR = ~(MB_A_PCI_MEM_SIZE - 1);
 
                /* I don't understand this, but the SolutionGear example code
@@ -775,7 +775,7 @@ pci_alloc_consistent (struct pci_dev *pdev, size_t size, 
dma_addr_t *dma_addr)
 /* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
    be values that were returned from pci_alloc_consistent.  SIZE must be
    the same as what as passed into pci_alloc_consistent.  References to
-   the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past
+   the memory and mappings associated with CPU_ADDR or DMA_ADDR past
    this call are illegal.  */
 void
 pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
-
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