Commit:     b33ac88b4c23330043acad930517282eb486db1d
Parent:     0552f73b9a81d39d50b71a5c06cf36efff80b6fd
Author:     Kevin Pedretti <[EMAIL PROTECTED]>
AuthorDate: Sun Oct 21 08:54:53 2007 +0200
Committer:  Avi Kivity <[EMAIL PROTECTED]>
CommitDate: Mon Oct 22 12:03:29 2007 +0200

    KVM: Fix local apic timer divide by zero
    kvm_lapic_reset() was initializing apic->timer.divide_count to 0,
    which could potentially lead to a divide by zero error in
    apic_get_tmcct().  Any guest that reads the APIC's CCR (current count)
    register before setting DCR (divide configuration) would trigger a divide
    by zero exception in the host kernel, leading to a host-OS crash.
    This patch results in apic->timer.divide_count being initialized to
    2 at reset, eliminating the bug (DCR=0 at reset, meaning divide by 2).
    Signed-off-by: Kevin Pedretti <[EMAIL PROTECTED]>
    Signed-off-by: Avi Kivity <[EMAIL PROTECTED]>
 drivers/kvm/lapic.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/kvm/lapic.c b/drivers/kvm/lapic.c
index a190587..443730e 100644
--- a/drivers/kvm/lapic.c
+++ b/drivers/kvm/lapic.c
@@ -853,7 +853,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
                apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
                apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
-       apic->timer.divide_count = 0;
+       update_divide_count(apic);
        atomic_set(&apic->timer.pending, 0);
        if (vcpu->vcpu_id == 0)
                vcpu->apic_base |= MSR_IA32_APICBASE_BSP;
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