Commit:     52142e756e9bf6485d3d53596e8aff2e816a7253
Parent:     f9b6c1de697f07dd0fb1c79bb3a6a8aa302f7476
Author:     Benjamin Herrenschmidt <[EMAIL PROTECTED]>
AuthorDate: Mon Nov 19 19:25:06 2007 +1100
Committer:  Paul Mackerras <[EMAIL PROTECTED]>
CommitDate: Tue Nov 20 11:37:43 2007 +1100

    [POWERPC] Fix kmalloc alignment on non-coherent DMA platforms
    On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
    that the kmalloc minimum alignment is set to the cache line size, to
    avoid sharing cache lines between different objects, so that DMA to
    one of the objects doesn't corrupt the other.
    Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
    Signed-off-by: Paul Mackerras <[EMAIL PROTECTED]>
 include/asm-powerpc/page_32.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h
index 374d0db..17110af 100644
--- a/include/asm-powerpc/page_32.h
+++ b/include/asm-powerpc/page_32.h
@@ -6,6 +6,10 @@
 #define PPC_MEMSTART   0
 #ifndef __ASSEMBLY__
  * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
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