Commit:     0f5e49a2e2de69ee05ad8783274b0672247fd18f
Parent:     6d2d419ffd83502d105014288e6af171a0a89544
Author:     Manuel Lauss <[EMAIL PROTECTED]>
AuthorDate: Thu Dec 6 08:11:56 2007 +0100
Committer:  Ralf Baechle <[EMAIL PROTECTED]>
CommitDate: Sun Dec 9 04:51:10 2007 +0000

    [MIPS] Alchemy: Fix Au1x SD controller IRQ
    With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of
    the au1100/au1200 SD controller(s) is no longer valid.
    Signed-off-by: Manuel Lauss <[EMAIL PROTECTED]>
    Signed-off-by: Ralf Baechle <[EMAIL PROTECTED]>
 include/asm-mips/mach-au1x00/au1100_mmc.h |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/include/asm-mips/mach-au1x00/au1100_mmc.h 
index 9e7d1ba..9e0028f 100644
--- a/include/asm-mips/mach-au1x00/au1100_mmc.h
+++ b/include/asm-mips/mach-au1x00/au1100_mmc.h
@@ -41,8 +41,11 @@
 #define NUM_AU1100_MMC_CONTROLLERS     2
-#define AU1100_SD_IRQ  2
+#if defined(CONFIG_SOC_AU1100)
+#define AU1100_SD_IRQ  AU1100_SD_INT
+#elif defined(CONFIG_SOC_AU1200)
+#define AU1100_SD_IRQ  AU1200_SD_INT
 #define SD0_BASE       0xB0600000
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