Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=313d8e57b074d5f03dfed2755f21ae41a6f0fd5a
Commit:     313d8e57b074d5f03dfed2755f21ae41a6f0fd5a
Parent:     aec103bfa60e9f72bd66a144236592f54b986a03
Author:     Joe Perches <[EMAIL PROTECTED]>
AuthorDate: Tue Dec 18 17:02:21 2007 -0800
Committer:  Tony Luck <[EMAIL PROTECTED]>
CommitDate: Tue Dec 18 17:02:21 2007 -0800

    [IA64] Two trivial spelling fixes
    
    s/addres/address/
    s/performanc/performance/
    
    Signed-off-by: Joe Perches <[EMAIL PROTECTED]>
    Signed-off-by: Tony Luck <[EMAIL PROTECTED]>
---
 arch/ia64/sn/pci/tioce_provider.c |    2 +-
 include/asm-ia64/hw_irq.h         |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/ia64/sn/pci/tioce_provider.c 
b/arch/ia64/sn/pci/tioce_provider.c
index cee9379..e1a3e19 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -41,7 +41,7 @@
  *     } else
  *             do desired mmr access
  *
- * According to hw, we can use reads instead of writes to the above addres
+ * According to hw, we can use reads instead of writes to the above address
  *
  * Note this WAR can only to be used for accessing internal MMR's in the
  * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff.  This includes the
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index bba5baa..7e6e377 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -63,7 +63,7 @@ extern int ia64_last_device_vector;
 #define IA64_NUM_DEVICE_VECTORS                (IA64_LAST_DEVICE_VECTOR - 
IA64_FIRST_DEVICE_VECTOR + 1)
 
 #define IA64_MCA_RENDEZ_VECTOR         0xe8    /* MCA rendez interrupt */
-#define IA64_PERFMON_VECTOR            0xee    /* performanc monitor interrupt 
vector */
+#define IA64_PERFMON_VECTOR            0xee    /* performance monitor 
interrupt vector */
 #define IA64_TIMER_VECTOR              0xef    /* use highest-prio group 15 
interrupt for timer */
 #define        IA64_MCA_WAKEUP_VECTOR          0xf0    /* MCA wakeup (must be 
>MCA_RENDEZ_VECTOR) */
 #define IA64_IPI_LOCAL_TLB_FLUSH       0xfc    /* SMP flush local TLB */
-
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