Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=04fa11ea170afd147b5d1e1ec88ec359a766bf31
Commit:     04fa11ea170afd147b5d1e1ec88ec359a766bf31
Parent:     c0a698b7443a9fce76b0a849f06c45ac78f3b0a0
Author:     Jason Gaston <[EMAIL PROTECTED]>
AuthorDate: Fri Dec 21 01:27:19 2007 +0100
Committer:  Ingo Molnar <[EMAIL PROTECTED]>
CommitDate: Fri Dec 21 01:27:19 2007 +0100

    x86: intel_cacheinfo.c: cpu cache info entry for Intel Tolapai
    
    This patch adds a cpu cache info entry for the Intel Tolapai cpu.
    
    Signed-off-by: Jason Gaston <[EMAIL PROTECTED]>
    Signed-off-by: Ingo Molnar <[EMAIL PROTECTED]>
    Signed-off-by: Thomas Gleixner <[EMAIL PROTECTED]>
---
 arch/x86/kernel/cpu/intel_cacheinfo.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c 
b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 606fe4d..9f530ff 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -49,6 +49,7 @@ static struct _cache_table cache_table[] __cpuinitdata =
        { 0x3c, LVL_2,      256 },      /* 4-way set assoc, sectored cache, 64 
byte line size */
        { 0x3d, LVL_2,      384 },      /* 6-way set assoc, sectored cache, 64 
byte line size */
        { 0x3e, LVL_2,      512 },      /* 4-way set assoc, sectored cache, 64 
byte line size */
+       { 0x3f, LVL_2,      256 },      /* 2-way set assoc, 64 byte line size */
        { 0x41, LVL_2,      128 },      /* 4-way set assoc, 32 byte line size */
        { 0x42, LVL_2,      256 },      /* 4-way set assoc, 32 byte line size */
        { 0x43, LVL_2,      512 },      /* 4-way set assoc, 32 byte line size */
-
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