Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=08590556d65b2611c5821bc532ca30db776e6044
Commit: 08590556d65b2611c5821bc532ca30db776e6044
Parent: 6ae8b1efcc83103f2e323c9486f56a8671ca1880
Author: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
AuthorDate: Sat Jan 26 20:12:59 2008 +0100
Committer: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
CommitDate: Sat Jan 26 20:12:59 2008 +0100
sl82c105: remove no longer needed ->selectproc method
* Program register 0x40 in sl82c105_resetproc().
* Remove no longer needed sl82c105_selectproc() and pci_set_drvdata() calls.
Acked-by: Sergei Shtylyov <[EMAIL PROTECTED]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
---
drivers/ide/pci/sl82c105.c | 34 +++-------------------------------
1 files changed, 3 insertions(+), 31 deletions(-)
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index a854134..c7a125b 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -219,35 +219,8 @@ static int sl82c105_dma_end(ide_drive_t *drive)
}
/*
- * Ok, that is nasty, but we must make sure the DMA timings
- * won't be used for a PIO access. The solution here is
- * to make sure the 16 bits mode is diabled on the channel
- * when DMA is enabled, thus causing the chip to use PIO0
- * timings for those operations.
- */
-static void sl82c105_selectproc(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
- u32 val, old, mask;
-
- //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
-
- mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16;
- old = val = (u32)pci_get_drvdata(dev);
- if (drive->using_dma)
- val &= ~mask;
- else
- val |= mask;
- if (old != val) {
- pci_write_config_dword(dev, 0x40, val);
- pci_set_drvdata(dev, (void *)val);
- }
-}
-
-/*
* ATA reset will clear the 16 bits mode in the control
- * register, we need to update our cache
+ * register, we need to reprogram it
*/
static void sl82c105_resetproc(ide_drive_t *drive)
{
@@ -257,7 +230,8 @@ static void sl82c105_resetproc(ide_drive_t *drive)
DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
pci_read_config_dword(dev, 0x40, &val);
- pci_set_drvdata(dev, (void *)val);
+ val |= (CTRL_P1F16 | CTRL_P0F16);
+ pci_write_config_dword(dev, 0x40, val);
}
/*
@@ -310,7 +284,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct
pci_dev *dev, const c
pci_read_config_dword(dev, 0x40, &val);
val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
pci_write_config_dword(dev, 0x40, val);
- pci_set_drvdata(dev, (void *)val);
return dev->irq;
}
@@ -326,7 +299,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
hwif->set_pio_mode = &sl82c105_set_pio_mode;
hwif->set_dma_mode = &sl82c105_set_dma_mode;
- hwif->selectproc = &sl82c105_selectproc;
hwif->resetproc = &sl82c105_resetproc;
if (!hwif->dma_base)
-
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